 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
NM1282KSLAXAL датащи(PDF) 16 Page - Nanya Technology Corporation. |
|
|
|||||||||||||||||||||||||||||
NM1282KSLAXAL датащи(HTML) 16 Page - Nanya Technology Corporation. |
|
|
16 / 120 page  Version 1.3 16 Nanya Technology Corp. 06/2018 All Rights Reserved. © 2Gb SLC NAND + 2Gb LPDDR2 NM1282KSLAXAL NTC Proprietary Level: Property AC Test Condition Parameter Condition VCC : 1.70 to 1.95V Input level VCC – 0.2 V, 0.2 V Input pulse rise and fall time 3ns Input comparison level Vcc / 2 Output data comparison level Vcc / 2 Output Load 1 TTL GATE and CL=30pF NOTE 1 Busy to ready time depends on the pull-up resistor tied to the RY/ pin. Programming / Erasing Characteristics (Ta= -25 to 85 ℃, V CC =1.70 to 1.95V) Symbol Parameter Min Typ. Max Unit tPROG Average Programming Time – 300 700 μs tDCBSYW1 Data Cache Busy Time in Write Cache (following 11h) – – 10 μs tDCBSYW21 Data Cache Busy Time in Write Cache (following 15h) – – 700 μs N Number of Partial Program Cycles in the Same Page – – 4 cycle tBERASE Block Erase Time – 3.5 10 ms NOTE 1 tDCBSYW2 depends on the timing between internal programming time and data in time. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
