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HN58V65API-10 датащи(PDF) 22 Page - Renesas Technology Corp |
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HN58V65API-10 датащи(HTML) 22 Page - Renesas Technology Corp |
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22 / 28 page ![]() HN58V65AI/HN58V66AI/HN58V65A-SR/HN58V66A-SR Series Rev.3.00, Feb.02.2004, page 22 of 26 2.2 Protection by RES (only the HN58V66A series) The unprogrammable state can be realized by that the CPU’s reset signal inputs directly to the EEPROM’s RES pin. RES should be kept V SS level during VCC on/off. The EEPROM breaks off programming operation when RES becomes low, programming operation doesn’t finish correctly in case that RES falls low during programming operation. RES should be kept high for 10 ms after the last data input. VCC RES WE or CE 100 µs min 10 ms min 1 µs min Program inhibit Program inhibit |
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