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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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GPCE4XXXX датащи(PDF) 28 Page - Generalplus Technology Inc. |
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GPCE4XXXX датащи(HTML) 28 Page - Generalplus Technology Inc. |
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28 / 49 page  GPCE4XXXX © Generalplus Technology Inc. Proprietary & Confidential 28 Jun. 26, 2017 Version: 1.1 7 FUNCTION DESCRIPTIONS 7.1 CPU The GPCE4xxxx is equipped with a 16-bit ’nS2.0P™ (pronounced as micro-n-SP). Sixteen registers are featured in ’nSP™ 2.0: R1 - R4 and R8 ~ R15 (General- purpose registers), PC (Program Counter), SP (Stack Pointer), Base Pointer (BP) , SR (Segment Register) and eight extended registers. The interrupts include 23 FIQs (Fast Interrupt Request) and IRQs (Interrupt Request), plus one software-interrupt, BREAK. 7.2 Memory 7.2.1 SRAM There are 4K-word working SRAM and 2K-word Cache RAM (also can be working RAM), ranged from $0000 through $17FF. 7.2.2 OTP GPCE4xxxx features a high-speed memory with access speed of three CPU clock cycles. 7.3 PLL, Clock, Power Mode 7.3.1 PLL (Phase Lock Loop) The purpose of PLL is to provide a base frequency (32768Hz) and to pump the frequency from 6MHz to 48MHz for system clock (FOSC). The default PLL frequency is 12MHz. 7.3.1.1 System clock Basically, the system clock is provided by PLL and programmed by the Port_SystemClock (R/W) to determine the clock frequency for system. 7.3.1.2 32768Hz RTC The Real Time Clock (RTC) is normally used in watch, clock or other time related products. A 2Hz-RTC (0.5 seconds) function is loaded in GPCE4xxxx. The RTC counts the time as well as to wake CPU up whenever RTC occurs. Since the RTC is generated each 0.5 seconds, time can be tracked by the total number of RTC occurrences. In addition, GPCE4xxxx supports 32768Hz crystal oscillator in normal mode and auto-power-saving mode. In normal mode, 32768Hz OSC always runs at the highest power consumption. In auto-power-saving mode, however, it runs at normal mode for the first 7.5 seconds and switches back to power-saving mode automatically to save powers. 7.4 Standby Mode The GPCE4xxxx features a power savings mode (or called standby mode) for low power applications. In such mode, SRAM and I/Os remain in the previous states until CPU being awakened. After GPCE4xxxx wakes up, CPU will continue to execute the program from where it slept. 7.5 Low Voltage Detection and Low Voltage Reset 7.5.1 Low voltage detection (LVD) The Low Voltage Detection (LVD) reports the circumstance of present voltage. There are seven LVD levels to be selected: 2.4V, 2.6V, 2.8V, 3.0V, 3.2V, 3.4V, and 3.6V. 7.5.2 Low voltage reset In addition to the LVD, GPCE4xxxx has another important function, Low Voltage Reset (LVR). With LVR function, a reset signal is generated to reset system when the operating voltage drops below LVR level. 7.6 Interrupt The GPCE4xxxx has 25 interrupt sources, grouped into two types, FIQ (Fast Interrupt Request) and IRQ (Interrupt request). The priority of FIQ is higher than IRQ. User can refer programming guide for details. 7.7 I/O The GPCE4xxxx has 48 bit-programmable I/Os. with programmable wakeup capability. The following diagram is an I/O schematic. Data Register & Control Logic I/O Pad P_IOA/B/C_Buffer(R) P_IOA/B/C_Buffer(W) P_IOA/B/C_Dir(R/W) P_IOA/B/C_Attrib(R/W) P_IOA/B/C_Data(R) In addition to a general purpose I/O port function, IOA/B/C also shares/carries some special functions. A summary of IOA/B/C special functions is listed as follows: |
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