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ISP1521 датащи(PDF) 39 Page - NXP Semiconductors

номер детали ISP1521
подробное описание детали  Hi-Speed Universal Serial Bus hub controller
PDF  53 Pages
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производитель  PHILIPS [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

ISP1521 датащи(HTML) 39 Page - NXP Semiconductors

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Philips Semiconductors
ISP1521
Hi-Speed USB hub controller
Product data
Rev. 03 — 24 November 2004
39 of 53
9397 750 13702
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table 43:
Dynamic characteristics: high-speed source electrical characteristics
VCC = 3.0 V to 3.6 V; Tamb = −40 °Cto+70 °C; test circuit Figure 21; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Driver characteristics
tHSR
rise time
10 % to 90 %
500
-
-
ps
tHSF
fall time
90 % to 10 %
500
-
-
ps
Clock timing
tHSDRAT
data rate
479.76
-
480.24
Mbit/s
tHSFRAM
microframe interval
124.9375 -
125.0625
µs
tHSRFI
consecutive microframe interval
difference
1
-
four high-speed
bit times
ns
Table 44:
Dynamic characteristics: full-speed source electrical characteristics
VCC = 3.0 V to 3.6 V; Tamb = −40 °Cto+70 °C; test circuit Figure 22; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Driver characteristics
tFR
rise time
CL = 50 pF; 10 % to 90 % of
|VOH − VOL|
4
-
20
ns
tFF
fall time
CL = 50 pF; 90 % to 10 % of
|VOH − VOL|
4
-
20
ns
tFRFM
differential rise and fall time
matching
[1] 90
-
111.1
%
ZDRV
driver output resistance
for the driver that is not
high-speed capable
28
-
44
VCRS
output signal crossover voltage
[1][2] 1.3
-
2.0
V
Data source timing[2]
tDJ1
source differential jitter for
consecutive transitions
see Figure 10
[1]
−3.5
-
+3.5
ns
tDJ2
source differential jitter for paired
transitions
see Figure 10
[1]
−4
-
+4
ns
tFEOPT
source SE0 interval of EOP
see Figure 11
160
-
175
ns
tFDEOP
source differential data-to-EOP
transition skew
see Figure 11
−2
-
+5
ns
Receiver timing[2]
tJR1
receiver data jitter tolerance for
consecutive transitions
see Figure 12
−18.5
-
+18.5
ns
tJR2
receiver data jitter tolerance for
paired transitions
see Figure 12
−9
-
+9
ns
tFEOPR
receiver SE0 width
accepted as EOP; see
Figure 11
82
--ns
tFST
width of SE0 interval during
differential transaction
rejected as EOP; see Figure 13
--14
ns
Hub timing (downstream ports configured as full-speed)[2]
tFHDD
hub differential data delay (without
cable)
see Figure 14; CL = 0 pF
--44
ns



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