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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC866PZP100 датащи(PDF) 37 Page - Freescale Semiconductor, Inc |
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MPC866PZP100 датащи(HTML) 37 Page - Freescale Semiconductor, Inc |
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37 / 92 page  MOTOROLA MPC866/859 Hardware Specifications 37 Bus Signal Timing Table 11 shows the PCMCIA timing for the MPC866/859. Table 11. PCMCIA Timing Num Characteristic 33 MHz 40 MHz 50 MHz 66 MHz Unit Min Max Min Max Min Max Min Max P44 A(0:31), REG valid to PCMCIA Strobe asserted 1 (MIN = 0.75 x B1 – 2.00) 1 PSST = 1. Otherwise, add PSST times cycle time. PSHT = 0. Otherwise, add PSHT times cycle time. These synchronous timings define when the WAITx signals are detected in order to freeze (or relieve) the PCMCIA current cycle. The WAITx assertion will be effective only if it is detected 2 cycles before the PSL timer expiration. See PCMCIA Interface in the MPC866 PowerQUICC User’s Manual. 20.70 — 16.70 — 13.00 — 9.40 — ns P45 A(0:31), REG valid to ALE negation1 (MIN = 1.00 x B1 – 2.00) 28.30 — 23.00 — 18.00 — 13.20 — ns P46 CLKOUT to REG valid (MAX = 0.25 x B1 + 8.00) 7.60 15.60 6.30 14.30 5.00 13.00 3.80 11.80 ns P47 CLKOUT to REG invalid (MIN = 0.25 x B1 + 1.00) 8.60 — 7.30 — 6.00 — 4.80 — ns P48 CLKOUT to CE1, CE2 asserted (MAX = 0.25 x B1 + 8.00) 7.60 15.60 6.30 14.30 5.00 13.00 3.80 11.80 ns P49 CLKOUT to CE1, CE2 negated (MAX = 0.25 x B1 + 8.00) 7.60 15.60 6.30 14.30 5.00 13.00 3.80 11.80 ns P50 CLKOUT to PCOE, IORD, PCWE, IOWR assert time (MAX = 0.00 x B1 + 11.00) — 11.00 — 11.00 — 11.00 — 11.00 ns P51 CLKOUT to PCOE, IORD, PCWE, IOWR negate time (MAX = 0.00 x B1 + 11.00) 2.00 11.00 2.00 11.00 2.00 11.00 2.00 11.00 ns P52 CLKOUT to ALE assert time (MAX = 0.25 x B1 + 6.30) 7.60 13.80 6.30 12.50 5.00 11.30 3.80 10.00 ns P53 CLKOUT to ALE negate time (MAX = 0.25 x B1 + 8.00) — 15.60 — 14.30 — 13.00 — 11.80 ns P54 PCWE, IOWR negated to D(0:31) invalid1 (MIN = 0.25 x B1 – 2.00) 5.60 — 4.30 — 3.00 — 1.80 — ns P55 WAITA and WAITB valid to CLKOUT rising edge1 (MIN = 0.00 x B1 + 8.00) 8.00 — 8.00 — 8.00 — 8.00 — ns P56 CLKOUT rising edge to WAITA and WAITB invalid1 (MIN = 0.00 x B1 + 2.00) 2.00 — 2.00 — 2.00 — 2.00 — ns Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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