Application Circuits

Crystal or Ceramic Resonator for Multiple I/O Applications

Note:

The resistance and capacitance for reset circuit should be designed in such a way as to ensure that the VDD is

stable and remains within a valid operating voltage range before bringing RES to high.

X1 can use 6MHz or 12MHz, X1 as close OSC1 & OSC2 as possible

Components with * are used for EMC issue.

22pF capacitances are used for resonator only.

HT48RB8

Rev. 1.30

24

February 10, 2003

H T 4 8 R B 8

V D D

O S C 1

O S C 2

R E S

V S S

U S B D +

U S B D -

V 3 3 O

1 . 5 k W

0 . 1 m .

1 0 0 k W

1 0 m .

3 3 W

V D D

U S B -

U S B +

V S S

3 3 W

3 3 W

P A 0 ~ P A 7

P B 0 ~ P B 7

P C 0 ~ P C 7

P D 0 ~ P D 7

X 1

0 . 1 m .

4 7 p .

*

4 7 p .

*

*

*

*

0 . 1 m .

2 2 p .

2 2 p .

0 . 1 m .

1 0 k W

5 W

0 . 1 m .

*

*

*

*

4 7 p . *

4 7 p . *

Mask Options

The following table shows all kinds of mask option in the microcontroller. All of the mask options must be defined to en-

sure proper system functioning.

No.

Option

1

Chip lock bit (by bit)

2

PA0~PA7 pull-high resistor enabled or disabled (by bit)

3

PA0~PA5 pull down resistor enabled or disabled (by bit)

4

PB0~PB7 pull-high resistor enabled or disabled (by nibble)

5

PC0~PC7 pull-high resistor enabled or disabled (by nibble)

6

PD0~PD7 pull-high resistor enabled or disabled (by nibble)

7

LVR enable or disable

8

WDT enable or disable

9

10

CLRWDT instruction(s): 1 or 2

11

PA0~PA7 output structures: CMOS/NMOS open-drain or PMOS open-drain (by bit)

12

PA0~PA7 wake-up enabled or disabled (by bit)

13

A/D converter enabled or disabled