поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

INMP521ACEZ-R0 датащи(PDF) 5 Page - TDK Electronics

номер детали INMP521ACEZ-R0
подробное описание детали  Ultra-Low Noise Microphone with Bottom Port and PDM Digital Output
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  TDK [TDK Electronics]
домашняя страница  http://www.tdk.com
Logo TDK - TDK Electronics

INMP521ACEZ-R0 датащи(HTML) 5 Page - TDK Electronics

  INMP521ACEZ-R0 Datasheet HTML 1Page - TDK Electronics INMP521ACEZ-R0 Datasheet HTML 2Page - TDK Electronics INMP521ACEZ-R0 Datasheet HTML 3Page - TDK Electronics INMP521ACEZ-R0 Datasheet HTML 4Page - TDK Electronics INMP521ACEZ-R0 Datasheet HTML 5Page - TDK Electronics INMP521ACEZ-R0 Datasheet HTML 6Page - TDK Electronics INMP521ACEZ-R0 Datasheet HTML 7Page - TDK Electronics INMP521ACEZ-R0 Datasheet HTML 8Page - TDK Electronics INMP521ACEZ-R0 Datasheet HTML 9Page - TDK Electronics Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 20 page
background image
INMP521
TABLE 2. TIMING CHARACTERISTICS
TA = −40 to 85°C, VDD = 1.8 to 3.3 V, CLK = 2.4 MHz, CLOAD = 30 pF, unless otherwise noted. All minimum and maximum specifications
are guaranteed. Typical specifications are not guaranteed.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
SLEEP MODE
Sleep Time
Time from CLK falling (fCLK < 1 kHz)
1
ms
1
Wake-Up Time
Time from CLK rising (fCLK > 1 kHz), power on
10
ms
1
INPUT
tCLKIN
Input clock period
326
800
ns
Clock Frequency (CLK)
1.25
2.4
3.072
MHz
1
Clock Duty Cycle
40
60
%
tRISE
CLK rise time (10% to 90% level)
25
ns
2
tFALL
CLK fall time (90% to 10% level)
25
ns
2
OUTPUT
t1OUTEN
DATA1 (right) driven after falling clock edge
40
ns
t1OUTDIS
DATA1 (right) disabled after rising clock edge
5
30
ns
t2OUTEN
DATA2 (left) driven after rising clock edge
40
ns
t2OUTDIS
DATA2 (left) disabled after falling clock edge
5
30
ns
Note 1: The microphone operates at any clock frequency between 1.25 MHz and 3.072 MHz. Some specifications may not be guaranteed at frequencies other than
2.4 MHz.
Note 2: Guaranteed by design.
TIMING DIAGRAM
Figure 1. Pulse Density Modulated Output Timing
tCLKIN
CLK
DATA2
DATA1
t2OUTDIS
t1OUTDIS
t2OUTEN
t1OUTEN
tRISE
tFALL
Page 5 of 20
Document Number: DS-INMP521-00
Revision: 1.0.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com