SPC81A1
6.13. Power Savings Mode
The SPC81A1 provides a power savings mode (Standby mode)
for those applications that require very low stand-by current. To
enter standby mode, the Wake-Up Register should be enabled
and then stop the CPU clock by writing the STOP CLOCK
Register. The CPU will then go to the stand-by mode. In such a
mode, RAM and I/Os will remain in their previous states until being
awakened.
Port IOD7-0 is the only wake-up source in the
SPC81A1. After the SPC81A1 is awakened, the internal CPU
will go to the RESET State (Tw ≧ 65536 x T1) and then continue
processing the program. Wakeup Reset will not affect RAM or
I/Os (FIG.1).
T1
Tw
CPU CLK
Sleep
Wake-up
Reset
FIG. 1
T1 = 1 / (FCPU), Tw ≧ 65536 x T1
6.14. Low Voltage Reset
The SPC81A1 provides a Low Voltage Reset (LVR) function.
Below the minimum power-supply voltage of 2.2V, the CPU
system will become unstable and malfunction.
Low Voltage
Reset will reset all functions into the initial operational (stable)
state if the VDD power-supply voltage drops below 2.2V (See
FIG.2).
T2
TW
T2
2 * T1
≧
T1
2.2V
VDD
CPU CLK
RESET
(The LVR function is the same as Power ON Reset or External Reset.)
FIG. 2
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
7
SEP. 06, 2001
Version: 1.3
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
