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PIC12F635E/ST датащи(PDF) 111 Page - Microchip Technology |
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PIC12F635E/ST датащи(HTML) 111 Page - Microchip Technology |
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111 / 196 page ![]() © 2005 Microchip Technology Inc. Preliminary DS41232B-page 109 PIC12F635/PIC16F636/639 REGISTER 11-8: AFE STATUS REGISTER 7 (ADDRESS: 0111) See Table 11-7 for the bit conditions of the AFE Status register after various SPI commands and the AFE Power-on Reset. R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 CHZACT CHYACT CHXACT AGCACT WAKEZ WAKEY WAKEX ALARM PEI bit 8 bit 0 bit 8 CHZACT: Channel Z Active(1) bit (cleared via Soft Reset) 1 = Channel Z is passing data after TAGC 0 = Channel Z is not passing data after TAGC bit 7 CHYACT: Channel Y Active(1) bit (cleared via Soft Reset) 1 = Channel Y is passing data after TAGC 0 = Channel Y is not passing data after TAGC bit 6 CHXACT: Channel X Active(1) bit (cleared via Soft Reset) 1 = Channel X is passing data after TAGC 0 = Channel X is not passing data after TAGC bit 5 AGCACT: AGC Active Status bit (real time, cleared via Soft Reset) 1 = AGC is active (Input signal is strong). AGC is active when input signal level is approximately > 20 mVPP range. 0 = AGC is inactive (Input signal is weak) bit 4 WAKEZ: Wake-up Channel Z Indicator Status bit (cleared via Soft Reset) 1 = Channel Z caused a AFE wake-up (passed ÷64 clock counter) 0 = Channel Z did not cause a AFE wake-up bit 3 WAKEY: Wake-up Channel Y Indicator Status bit (cleared via Soft Reset) 1 = Channel Y caused a AFE wake-up (passed ÷64 clock counter) 0 = Channel Y did not cause a AFE wake-up bit 2 WAKEX: Wake-up Channel X Indicator Status bit (cleared via Soft Reset) 1 = Channel X caused a AFE wake-up (passed ÷64 clock counter) 0 = Channel X did not cause a AFE wake-up bit 1 ALARM: Indicates whether an Alarm timer time-out has occurred (cleared via read “Status Register command”) 1 = The Alarm timer time-out has occurred. It may cause the ALERT output to go low depending on the state of bit 4 of the Configuration register 0 0 = The Alarm timer is not timed out bit 0 PEI: Parity Error Indicator bit – indicates whether a Configuration register parity error has occurred (real time) 1 = A parity error has occurred and caused the ALERT output to go low 0 = A parity error has not occurred Note 1: Bit is high whenever channel is passing data. Bit is low in Standby mode. Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
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