PIC12F635 datasheet(27/196 Pages) MICROCHIP

27 / 196 page

Preliminary

DS41232B-page 25

PIC12F635/PIC16F636/639

2.2.2.6

PCON Register

The Power Control (PCON) register (see Table 12-3)

contains flag bits to differentiate between a:

• Power-on Reset (POR)

• Wake-up Reset (WUR)

• Brown-out Detect (BOD)

• Watchdog Timer Reset (WDT)

• External MCLR Reset

The PCON register also controls the Ultra Low-Power

Wake-up and software enable of the BOD.

The PCON register bits are shown in Register 2-6.

PCON – POWER CONTROL REGISTER (ADDRESS: 8Eh)

U-0

R/W-0

R/W-1

R/W-x

U-0

R/W-0

R/W-x

—

ULPWUE SBODEN(1)

WUR

—POR

BOD

bit 7

bit 0

bit 7-6

Unimplemented: Read as ‘0’

bit 5

ULPWUE: Ultra Low-Power Wake-up Enable bit

= Ultra Low-Power Wake-up enabled

= Ultra Low-Power Wake-up disabled

bit 4

SBODEN: Software BOD Enable bit(1)

= BOD enabled

= BOD disabled

bit 3

WUR: Wake-up Reset Status bit

= No Wake-up Reset occurred

= A Wake-up Reset occurred (must be set in software after a Power-on Reset occurs)

bit 2

Unimplemented: Read as ‘0’

bit 1

POR: Power-on Reset Status bit

= No Power-on Reset occurred

= A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)

bit 0

BOD: Brown-out Detect Status bit

= No Brown-out Detect occurred

= A Brown-out Detect occurred (must be set in software after a Brown-out Detect occurs)

Note 1: BODEN<1:0> = 01 in the Configuration Word register for SBODEN to control the

Brown-out Detect module.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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