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GD25Q80CSIG датащи(PDF) 20 Page - GigaDevice Semiconductor (Beijing) Inc.

номер детали GD25Q80CSIG
подробное описание детали  3.3V Uniform Sector Dual and Quad Serial Flash
PDF  67 Pages
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производитель  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
домашняя страница  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD25Q80CSIG датащи(HTML) 20 Page - GigaDevice Semiconductor (Beijing) Inc.

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3.3V Uniform Sector
Dual and Quad Serial Flash
GD25Q80C
20
Figure 8. Quad Output Fast Read Sequence Diagram
7.10.
Dual I/O Fast Read (BBH)
The Dual I/O Fast Read command is similar to the Dual Output Fast Read command but with the capability to input the
3-Byte address (A23-
0) and a “Continuous Read Mode” Byte 2-bit per clock by SI and SO, each bit being latched in during
the rising edge of SCLK, then the memory contents are shifted out 2-bit per clock cycle from SI and SO. The command
sequence is shown in followed Figure 9. The first Byte addressed can be at any location. The address is automatically
incremented to the next higher address after each Byte of data is shifted out.
Dual I/O Fast Read with “Continuous Read Mode”
The Dual I/O Fast
Read command can further reduce command overhead through setting the “Continuous Read Mode”
bits (M7-0) after the input 3-Byte address (A23-
A0). If the “Continuous Read Mode” bits (M7-0) =AXH, then the next Dual
I/O Fast Read command (after CS# is raised and then lowered) does not require the BBH command code. The command
sequence is shown in followed Figure 10
. If the “Continuous Read Mode” bits (M7-0) are any value other than AXH, the
next command requires the first BBH command code, thus returning to nor
mal operation. A “Continuous Read Mode” Reset
command can be used to reset (M7-0) before issuing normal command.
Command
0
1
2
3
4
5
6
7
6BH
CS#
SCLK
SI(IO0)
SO(IO1)
High-Z
8
9 10
28 29 30 31
3
2
1
0
23 22 21
24-bit address
34 35 36 37
33
1
5
1
5
1
5
1
38 39
Byte1
32
42 43 44 45
41
46 47
40
5
Dummy Clocks
0
4
0
4
0
4
0
4
4
5
WP#(IO2)
High-Z
HOLD#(IO3)
High-Z
CS#
SCLK
SI(IO0)
SO(IO1)
WP#(IO2)
HOLD#(IO3)
2
6
2
6
2
6
2
6
6
3
7
3
7
3
7
3
7
7
Byte2 Byte3 Byte4



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