FS7755

Rev. 1.1

18/22

Freq =

2

4

1

2

1

06

.

8

REF

V

F

Gain

V

V

−

×

×

×

×

Where:

Freq: Output frequency on F1 and F2 (Hz)

V1:

Differential rms voltage signal on Channel 1 (Volts)

V2:

Differential rms voltage signal on Channel 2 (Volts)

Gain: 1, 2, 8, or 16, depending on the PGA gain selection made using logic inputs G0 and G1

S1

S0

XTAL/CLKIN

*

0

0

1.7

3.579545MHz/2

21

0

1

3.4

3.579545MHz/2

20

1

0

6.8

3.579545MHz/2

19

1

1

13.6

3.579545MHz/2

18

Table II

Note:

14.

Example

In this example, with AC voltages of ±470mV peak applied to V1 and ±660mV peak applied to V2, the

expected output frequency is calculated as follows:

Gain = 1, G0 = G1 = 0

Note:

If the on-chip reference is used, actual output frequencies may vary from device to device due to reference

tolerance of ±8%.

Freq =

2

5

.

2

2

2

7

.

1

1

66

.

0

47

.

0

06

.

8

×

×

×

×

×

×

= 0.34 (Hz)

Table Ⅲ shows a complete listing of all maximum output frequencies.

S1

S0

Max Frequency for AC Inputs (Hz)

0

0

0.34

0

1

0.68

1

0

1.36

1

1

2.72

Table

Maximum Output Frequency on F1 and F2

Ⅲ