
AT2004
4 Channels ADPCM Processor with Echo Cancellation and Conferencing
Page 19 of 25
©2001 Atelic System, Inc
30
// 2 channel high byte. Conferencing with Chan 0.
14
// 2 channel low byte. Conferencing with Chan 1 and Chan 4.
34
// 3 channel high byte. Conferencing with Chan 4.
56
// 3 channel low byte. Conferencing with Chan 5 and Chan 6.
00
// 4 channel high byte
00
// 4 channel low byte
00
// 5 channel high byte
00
// 5 channel low byte
30
// 6 channel high byte. Conferencing with Chan 0.
15
// 6 channel low byte. Conferencing with Chan 1 and Chan 5.
34
// 7 channel high byte. Conferencing with Chan 4.
50
// 7 channel low byte. Conferencing with Chan 5 and Chan 0.
Command bytes specifying per channel control
30
// Begin per channel control. This byte is fixed.
00
// begin at 0 channel. This byte is usually fixed (usually begin specifying at 0).
36
// 0 channel high byte.
70
// 0 channel low byte.
36
// 1 channel high byte.
70
// 1 channel low byte.
36
// 2 channel high byte.
70
// 2 channel low byte.
36
// 3 channel high byte.
70
// 3 channel low byte.
36
// 4 channel high byte.
70
// 4 channel low byte.
36
// 5 channel high byte.
70
// 5 channel low byte.
36
// 6 channel high byte.
70
// 6 channel low byte.
36
// 7 channel high byte.
70
// 7 channel low byte.
Command bytes specifying mcu7byte definition.
00
// begin mcu7byte definition.
D0 // [7]: input; [6]:output; 0==X; 1==Y, channel 0, yin-yout
5E
// Algorithm Setup, default value = 5EH for expand
00
// Delay
00
// Begin input slot bit, ADPCM
03
// End input slot bit, ADPCM
00
// Begin output slot bit, PCM
07
// End output slot bit, PCM
D0
// [7]: input; [6]:output; 0==X; 1==Y, channel 1, yin-yout
5E
// Algorithm Setup, default value = 5EH for expand
00
// Delay
10
// Begin input slot bit, ADPCM
13
// End input slot bit, ADPCM
10
// Begin output slot bit, PCM
17
// End output slot bit, PCM
F0
// [7]: input; [6]:output; 0==X; 1==Y, channel 2, yin-yout