LD7832A

10

Leadtrend Technology Corporation

www.leadtrend.com.tw

LD7832A-DS-00 April 2013

Ramp Generator Block and Zero Current

Detection (ZCD)

Fig. 3 shows typical ramp generator block and ZCD

block. The COMP pin voltage and the output of the ramp

generator

block

are

compared

to determine

the

MOSFET On-time, as shown in Fig. 4.

The LD7832A features transition mode operation. The

zero current detection block circuit detects the ZCD

signal to turn on the MOSFET soon after the voltage

across ZCD falls to 1V and also the current through the

inductor reaches zero. Instead, if there’s no signal

detected within 70

s, the time-out will generate a signal

to turn on MOSFET to ensure the system operate

properly.

PWM Comparator

R

S

OCP

1V/1.3V

Ramp

Generator

1V

Comparator

Comp

Q

GM

Fmax

Limit

Time

Out

Vref

ZCD

FB

Max On

Limit

Fig. 3

During the delay time as shown in Fig. 4, the junction

capacitor of the MOSFET resonates with the inductor

and

the

drain-source

voltage

(VDS)

decreases

accordingly. So, the MOSFET consumes less voltage

and the power dissipation will be minimized.

As recommended in Fig. 1, only one resistor (RZCD) is

required to connect ZCD pin in series with the inductor

to detect the inductor signal and protect ZCD pin from

damage. It makes the circuit simple and easy to design

with. Fig. 4 shows the related waveforms between the

changing inductor voltage and ZCD voltage. ZCD pin is

clamped at 5.3V or 0.3V in accordance with various

inductor voltages

.

Inductor

Current

Inductor

Voltage

0A

0V

0V

Delay Time

Minimum

Voltage Turn-on

OUT

RAMP

ZCD

Voltage

1V

5.3V

0.3V

Fig. 4

LED Short Protection (ZCD UVP)

– Auto

Recovery

To protect the circuit from damage due to LED short

condition, an auto-recovery type of ZCD UVP protection

is implemented for it. Fig. 5 shows the waveforms of the

ZCD UVP operation. In LED short condition, the

reflected output voltage of inductor will cause ZCD

voltage drop. If the ZCD voltage sinks below 4.3V for

more than the delay time of ZCD UVP, the protection will

be activated to turn off the gate until the 4th cycle of Vcc

hiccup is tripped. The ZCD UVP delay time is to prevent

the false-triggering.