AR8327-AL1A-R datasheet(151/394 Pages) ETC2

151 / 394 page

Atheros Communications, Inc.

AR8327/AR8327N Seven-port Gigabit Ethernet

Switch

•

151

3.6.28

PORT2_PRI_CTRL

Address 0x067C

SFT&HW RST

Table 3-134 summarizes the PORT2_PRI_CTRL Register

R/W

1'b0

PORT_LOOPBACK_EN_2

1'b1: LOOP BACK. Packet sent in from

this port will be sent out from the same

port. This packet will not sent to other

ports

1'b0: NORMAL FORWARDING

Enable learn operation.

1'b1: enable hardware learn new MAC

address into ARL table.

1'b0: won't learn new MAC address to

ARL table

R/W

1'b1

LEARN_EN_2

R/O

RESERVED

18:16

R/W

3'h4

PORT_STATE_2

R/O

RESERVED

14:12

R/O

RESERVED

R/O

RESERVED

R/W

FORCE_PORT_VLAN_EN_2

9:8

R/W

2'b00

VLAN_MODE_2

802.1Q mode for this port.

2'b00: 802.1Q disable. Use port base

VLAN only.

2'b01: fallback. Enable 802.1Q for all

received frames. Don't discard ingress

membership violation and use the port

base VLAN if the frame's VID isn't

contained in VLAN Table.

2'b10: check. Enable 802.1Q for all

received frames. Don't discard ingress

membership violation but discard

frames which VID isn't contained in

VLAN Table.

2'b11: secure. Enable 802.1Q for all

received frames. Discard frames with

ingress membership violation or whose

VID isn't contained in the VLAN Table.

7R/W

RESERVED

6:0

R/W

h7B

PORT_VID_MEM_2

Port Base VLAN Member. Each bit

restrict which port can send frames to.

To send frames to port0, bit 16 must be

set to 1'b1, etc. These bits are set to one

after reset except the port's bit. This

prevents frames going out the port

they received in.

Bit

R/W

Inital

Value

Mnemonic

Description

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