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LC470EUF датащи(PDF) 13 Page - LG Semicon Co.,Ltd. |
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LC470EUF датащи(HTML) 13 Page - LG Semicon Co.,Ltd. |
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13 / 40 page ![]() Product Specification 13 /40 LC470EUF Ver. 1.5 1) DC Specification 2) AC Specification - V 1.8 0.7 V IN LVDS Input Voltage Range - mV 250 ΔVCM Change in common mode Voltage - V 1.5 1.0 V CM LVDS Common mode Voltage Note Unit Max Min Symbol Description LVDS 1’st Clock T clk LVDS 2nd / 3rd / 4th Clock t SKEW_min tSKEW_max 20% 80% A t RF LVDS Data tSKEW LVDS Clock Tclk ( Fclk = 1 /Tclk ) tSKEW A 1. All Input levels of LVDS signals are based on the EIA 644 Standard. 2. If t RF isn’t enough, teff should be meet the range. 3. LVDS Differential Voltage is defined within t eff LVDS + LVDS - 0V V CM # V CM = {( LVDS +) + ( LVDS - )} /2 V IN _ MAX V IN _ MIN Note 3-4-2. LVDS Input Signal Characteristics Description Symbol Min Max Unit Note LVDS Differential Voltage V TH 100 300 mV 3 V TL -300 -100 mV LVDS Clock to Data Skew t SKEW - |(0.25*T clk)/7| ps - LVDS Clock/DATA Rising/Falling time t RF 260 |(0.3*T clk)/7| ps 2 Effective time of LVDS t eff |±360| - ps - LVDS Clock to Clock Skew (Even to Odd) t SKEW_EO - |1/7* T clk| ps - High Threshold Low Threshold |
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