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CYUSB3610 датащи(PDF) 13 Page - Cypress Semiconductor |
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CYUSB3610 датащи(HTML) 13 Page - Cypress Semiconductor |
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13 / 35 page ![]() CYUSB3610 Document Number: 001-94768 Rev. *C Page 13 of 35 Flow Chart of Default WOL Ready Mode (1) Operation Mode setting by Pin#19, #21 (2) Set GPIO_0 as PME definition (3) Pull-up GPIO[1] to enable Default WOL Ready mode. (4) Power on reset, either by on-chip power-on reset circuit or RESET# pin. The Default WOL Ready Mode is enabled. Wakeup event asserts? (1) PME asserts with static level that is used as power control to system processor. (2) Default WOL Ready Mode is disabled. System processor powers on and supplies VBUS to GX3. GX3 is in normal operation mode. Assert RESET# and GPIO[1] = 1? (1) PME de-asserts. (2) The Default WOL Ready Mode is enabled. YES YES NO NO |
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