7

¡ Semiconductor

MSM6636

CPU Serial Interface Timing

m

Clock synchronous Serial

OSCO (source oscillation) Pulse Cycle

tø

62

500

ns

Parameter

Symbol

Min

Typ

Max

Unit

SCLK-L Interval Width

8tø

—

ns

SCLK-H Interval Width

8tø

—

ns

SCLK ≠ - RXD Setup Time

4tø

—

ns

SCLK ≠ - RXD Hold Time

4tø

—

ns

SCLK ≠ - TXD Output Delay Time

4tø

6tø + 100

ns

A-D - SCLK ≠ Setup Time

0—

ns

SCLK ≠ - A-D Hold Time

8tø

—

ns

SCLK Frame Interval Time *1

8tø

—

ns

SCLK Frame Interval Time *2

16tø

—

ns

DVDD=AVDD=5V±10%, Ta =-40~+125°C

—

—

—

—

—

—

—

—

—

—

Between “Communication type (WR) and address setting” frame and “WR data” frame.

Between “WR data” frame and “WR data” frame during continuous WR.

Between “Communication type (RD) and address setting” frame and “RD data” frame.

Between “RD data” frame and “RD data” frame during continuous RD.