HT46R65/HT46C65

Rev. 1.80

24

July 14, 2005

The following programming example illustrates how to setup and implement an A/D conversion. The method of polling

the EOCB bit in the ADCR register is used to detect when the conversion cycle is complete.

Example: using EOCB Polling Method to detect end of conversion

clr

EADI

; disable ADC interrupt

mov

a,00000001B

mov

ACSR,a

mov

a,00100000B

; setup ADCR register to configure Port PB0~PB3 as A/D inputs

mov

ADCR,a

; and select AN0 to be connected to the A/D converter

:

:

; As the Port B channel bits have changed the following START

; signal (0-1-0) must be issued within 10 instruction cycles

:

Start_conversion:

clr

START

set

START

; reset A/D

clr

START

; start A/D

Polling_EOC:

sz

EOCB

; poll the ADCR register EOCB bit to detect end of A/D conversion

jmp

polling_EOC

; continue polling

mov

a,ADRH

; read conversion result high byte value from the ADRH register

mov

adrh_buffer,a

; save result to user defined memory

mov

a,ADRL

; read conversion result low byte value from the ADRL register

mov

adrl_buffer,a

; save result to user defined memory

:

:

jmp

start_conversion

; start next A/D conversion

A / D c o n v e r s i o n t i m e

A / D c o n v e r s i o n t i m e

A / D c o n v e r s i o n t i m e

0 0 0 B

0 0 0 B

1 0 0 B

0 1 0 B

S T A R T

E O C B

P C R 2 ~

P C R 0

A C S 2 ~

A C S 0

P o w e r - o n

R e s e t

E n d o f A / D

c o n v e r s i o n

1 : D e f i n e P B c o n f i g u r a t i o n

2 : S e l e c t a n a l o g c h a n n e l

N o t e :

S t a r t o f A / D

c o n v e r s i o n

R e s e t A / D

c o n v e r t e r

A / D s a m p l i n g t i m e

1 0 0 B

0 0 0 B

S t a r t o f A / D

c o n v e r s i o n

R e s e t A / D

c o n v e r t e r

0 0 0 B

1 . P B p o r t s e t u p a s I / O s

2 . A / D c o n v e r t e r i s p o w e r e d o f f

t o r e d u c e p o w e r c o n s u m p t i o n

1 0 1 B

0 0 1 B

S t a r t o f A / D

c o n v e r s i o n

R e s e t A / D

c o n v e r t e r

d o n ' t c a r e

E n d o f A / D

c o n v e r s i o n

E n d o f A / D

c o n v e r s i o n

M i n i m u m o n e i n s t r u c t i o n c y c l e n e e d e d , M a x i m u m t e n i n s t r u c t i o n c y c l e s a l l o w e d

A / D s a m p l i n g t i m e

A / D s a m p l i n g t i m e

A/D Conversion Timing