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TE28F320B3BC90 датащи(PDF) 29 Page - Intel Corporation |
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TE28F320B3BC90 датащи(HTML) 29 Page - Intel Corporation |
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29 / 58 page ![]() 28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 3UHOLPLQDU\ 23 4.5 AC Characteristics —Read Operations NOTES: 1. OE# may be delayed up to tELQV–tGLQV after the falling edge of CE# without impact on tELQV. 2. Sampled, but not 100% tested. See Figure 7, “AC Waveform: Read Operations” on page 26. See Figure 5, “Input/Output Reference Waveform” on page 22 for timing measurements and maximum allowable input slew rate. # Sym Parameter Density 4/8 Mbit Unit Product 90 ns 110 ns VCC 3.0 V–3.6 V 2.7 V–3.6 V 3.0 V–3.6 V 2.7 V–3.6 V Min Max Min Max Min Max Min Max R1 tAVAV Read Cycle Time 80 90 100 110 ns R2 tAVQV Address to Output Delay 80 90 100 110 ns R3 tELQV CE# to Output Delay(1) 80 90 100 110 ns R4 tGLQV OE# to Output Delay(1) 30 30 30 30 ns R5 tPHQV RP# to Output Delay 600 600 600 600 ns R6 tELQX CE# to Output in Low Z(2) 00 0 0 ns R7 tGLQX OE# to Output in Low Z(2) 00 0 0 ns R8 tEHQZ CE# to Output in High Z(2) 25 25 25 25 ns R9 tGHQZ OE# to Output in High Z(2) 25 25 25 25 ns R10 tOH Output Hold from Address, CE#, or OE# Change, Whichever Occurs First(2) 00 0 0 ns |
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