TS34118CS28

Taiwan Semiconductor

13

Version: E1608

APPLICATION INFORMATION (CONTINUE)

possible down to 2.8V. The power supply current is shown in Figure 18 for both the power-up and power-down

impedance at VB is ≈400Ω and in conjunction with the external capacitor at VB, forms a low pass filter for power

supply rejection with different capacitors. The choice of capacitor is application dependent base on whether the

circuit is powered by the telephone line or a power supply. Since VB biases the microphone and hybrid amplifiers,

the amount of supply rejection at their outputs is directly related to the rejection at VB, as well as their respective

gains. Depicts this graphically. The Chip Disable (pin 3) permits powering down the IC to conserve power and/or

In the powered down mode, the microphone and the hybrid amplifiers are disable, and their outputs go to a high

impedance state. Additionally, the bias is removed from the level detectors. The bias is not removed from the filter

(pins 1,2). The attenuators (pin 8,9, 21, 22), or from pin 13,14, and 15 (the attenuators are disabled, however, and

will not pass a signal). The input impedance at CD is typically 90kΩ, has a threshold of ≈ 1.5V, and the voltage at

Switching Time

The switching time of the TS34118 circuit is dominated by the components at CT (pin 14, refer to Figure 6), and

secondarily by the capacitors at the level detector outputs (RLO1, RLO2, TLO1, TLO2).

The time to switch to receive or to transmit from idle is determined by the capacitor at CT, together with the internal

current sources (refer to Figure 6). The switching time is:

ΔT=ΔV × CT / I

For the typical cause where ΔV=240mV, I=60μA. And CT is 50μF, ΔT=20ms. If the circuit switches directly from

receive to transmit (or vice-versa), the total switching time would be 40ms.

The switching time from either receive or transmit to idle depends on which type of idle mode is in effect. If the

circuit is going to “fast idle”, the time constant is determined by the CT capacitor, and the internal 2.0kΩ resistor

(Figure 6). With CT = 5μF, the time constant is ≈30ms (for 95% change). Fast idle is an infrequent occurrence,

however, occurring when both speakers are talking and competing for control of the circuit. The switching time from

idle back to either transmit or receive is described above.

If the circuit is switching to “slow idle”, the time constant is determined by the CT capacitor and RT, the external

resistor (see Figure 6). With CT = 5μF, and RT = 120KΩ, the time constant is ≈600ms, giving a switching time of ≈

1.8 seconds (for 95% change). The switching period to slow idle begins when both speakers have stopped talking.

The switching time back to the original mode will depend on how soon that speaker begins speaking again. The

sooner the speaking time starts during the 1.8 seconds period, the quicker the switching time since a smaller

voltage excursion is required. That switching time is determined by the internal current sources as described above.

The above switching times occur, however, after the level detectors have detected the appropriate signal levels,

since their outputs operate the Attenuator Control Block. Referring to Figure 4, the rise time of the level detector’s

outputs to new speech is quick by comparison (≈1.0ms), determined by the internal 350Ω

resistor and the

external capacitor (typically 2μF). The output’s decay time is determined by the external capacitor, and an internal

4μF current source giving a decay rate of ≈60ms for 120mV excursion at RLO or TLO. However, the overall

response time of the circuit is not a constant since it depends on the relative strength of the signals at the different

level detectors, as well as the timing of the signals with respect to each other. The capacitors at the four outputs

(RLO1, RLO2, TLO1, TLO2) must be equal value (±10%) to prevent problems in timing and level response.

The

rise time of the level detector’s outputs is not significant since it is so short. The decay time, however, provides a

significant part of the “hold time” necessary to hold the circuit during the normal pauses in speech.

The

components at the inputs of the level detectors (RLI1, RLI2, TLI1,TLI2) do not affect the switching time, but rather

affect the relative signal levels required to switch the circuit, as well as the frequency response of the detectors.