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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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COP8-NSDEV датащи(PDF) 61 Page - National Semiconductor (TI) |
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COP8-NSDEV датащи(HTML) 61 Page - National Semiconductor (TI) |
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61 / 83 page  18.0 Interrupts (Continued) STPND flag will have the wrong state. This will allow maskable interrupts to be acknowledged during the servicing of the first Software Trap. To avoid problems such as this, the user program should contain the Software Trap routine to perform a recovery procedure rather than a return to normal execution. Under normal conditions, the STPND flag is reset by a RPND instruction in the Software Trap service routine. If a programming error or hardware condition (brownout, power supply glitch, etc.) sets the STPND flag without providing a way for it to be cleared, all other interrupts will be locked out. To alleviate this condition, the user can use extra RPND instructions in the main program and in the Watchdog ser- vice routine (if present). There is no harm in executing extra RPND instructions in these parts of the program. 18.4.2.1 Programming Example: External Interrupt PSW =00EF CNTRL =00EE RBIT 0,PORTGC RBIT 0,PORTGD ; G0 pin configured Hi-Z SBIT IEDG, CNTRL ; Ext interrupt polarity; falling edge SBIT GIE, PSW ; Set the GIE bit SBIT EXEN, PSW ; Enable the external interrupt WAIT: JP WAIT ; Wait for external interrupt . . . .=0FF ; The interrupt causes a VIS ; branch to address 0FF ; The VIS causes a branch to ; interrupt vector table . . . .=01FA ; Vector table (within 256 byte .ADDRW SERVICE ; of VIS inst.) containing the ext ; interrupt service routine . . 20006334 FIGURE 33. VIS Flow Chart www.national.com 61 |
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