IC-PI datasheet(33/49 Pages) ICHAUS

33 / 49 page

preliminary

iC-PI PROGRAMMABLE 12-BIT

Sin/Cos INTERPOLATION IC WITH RS422 DRIVER

Rev B1, Page 33/48

SINE-TO-DIGITAL CONVERSION

SELRES

Addr. 0x21, bit 6:0; Addr. 0x20, bit 7:0

Value

STEP

Angle Steps

Per Period

IPF

Interpolation

Factor

fin()max*

Permissible Input

Frequency

(@ MTD)

0x0003

300 kHz

0x0007

300 kHz

0x000F

300 kHz

0x0013

300 kHz

0x001F

300 kHz

0x0027

300 kHz

0x003F

300 kHz

0x004F

300 kHz

0x0063

100

300 kHz

0x007F

128

300 kHz

0x009F

160

250 kHz

0x00C7

200

200 kHz

0x00FF

256

159 kHz

0x018F

400

100

100 kHz

0x01F3

500

125

80 kHz

0x01FF

512

128

75 kHz

0x031F

800

200

50 kHz

0x03E7

1000

250

40 kHz

0x03FF

1024

256

38 kHz

0x07CF

2000

500

20 kHz

0x07FF

2048

512

19 kHz

0x0F9F

4000

1000

10 kHz

0x0FFF

4096

1024

9 kHz

Notes

Other settings are not allowed.

*) According to Figure 4, page 12.

Table 45: Converter Resolution

iC-PI’s converter resolution is selected with SELRES.

For a resolution of 4, four angle steps per input cycle

are generated so that the output frequency at A and B

matches the sine frequency at the inputs.

The programmable converter hysteresis is determined

by SELHYS. It is set in multiples of the increment size

and has a maximum of 45° of the input signal period.

SELHYS

Addr. 0x1F, bit 3:0

Code

Function

Code

Function

0x0

nearly none

0x8

2.0°

0x1

0.09°

0x9

4.0°

0x2

0.18°

0xA

6.0°

0x3

0.36°

0xB

8.0°

0x4

0.54°

0xC

10.0°

0x5

0.72°

0xD

11.25°

0x6

1.0°

0xE

22.5°

0x7

1.5°

0xF

45°

Table 46: Converter Hysteresis

STUPCNT

Addr. 0x21, bit 4

Code

Function

0x0

Count from zero angle: burst output to absolute

position within input cycle.

0x1

Suppress edges on ABZ.

Duration dependent on the Minimum Edge Distance

(MTD). Using the largest MTD, the process lasts up

to 15 ms.

Table 47: Converter Startup

HOLDCNT Addr. 0x21, bit 5

Code

Function

0x0

No Hold on min. amplitude error

0x1

Hold on min. amplitude error

Table 48: Converter Hold on Amplitude Error

AERR

NORMAL

HOLD

NORMAL

STARTUP

Figure 17: Modes for count signals

Figure 17 shows the device’s behavior during the op-

tional startup and hold modes.

STARTUP: When leaving the reset state, the interpola-

tor counts up from zero angle to the applied angle posi-

tion, at the maximum possible tracking frequency. The

bit STUPCNT defines whether the internally counted

signals are output at the pins (STUPCNT = 0), or su-

pressed (STUPCNT = 1).

NORMAL: After settling, the interpolator tracks the ap-

plied input angle in normal mode.

HOLD: In case of a signal error (loss of signal), the

sine-to-digital converter is set on hold and no further

count pulses can be seen at the outputs (HOLDCNT =

0).

NORMAL: As soon as the amplitude returns back to

regular levels, the converter continues counting from

the last value and generates as many pulses as re-

quired to catch up to the actual position. In doing so,

the outputs show the configured minimum edge dis-

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