CAT5409 datasheet(2/17 Pages) CATALYST

2 / 17 page

CAT5409

Document No. 2010, Rev. I

PIN DESCRIPTION

(TSSOP)

(SOIC)

(BGA) Name

Function

VCC

Supply Voltage

RL0

Low Reference Terminal

for Potentiometer 0

RH0

High Reference Terminal

for Potentiometer 0

RW0

Wiper Terminal for Potentiometer 0

Device Address

Write Protection

SDA

Serial Data Input/Output

Device Address

RL1

Low Reference Terminal

for Potentiometer 1

410

RH1

High Reference Terminal

for Potentiometer 1

511

RW1

Wiper Terminal for Potentiometer 1

GND

Ground

No Connect

814

RW2

Wiper Terminal for

Potentiometer 2

915

RH2

High Reference Terminal

for Potentiometer 2

RL2

Low Reference Terminal

for Potentiometer 2

SCL

Bus Serial Clock

Device Address

No Connect

Device Address, LSB

RW3

Wiper Terminal for Potentiometer 3

RH3

High Reference Terminal

for Potentiometer 3

RL3

Low Reference Terminal

for Potentiometer 3

No Connect

PIN DESCRIPTIONS

SCL:

Serial Clock

The CAT5409 serial clock input pin is used to clock

all data transfers into or out of the device.

SDA:

Serial Data

The CAT5409 bidirectional serial data pin is used

to transfer data into and out of the device. The

SDA pin is an open drain output and can be wire-

Ored with the other open drain or open collector

outputs.

A0, A1, A2, A3:

Device Address Inputs

These inputs set the device address when ad-

dressing multiple devices. A total of sixteen

devices can be addressed on a single bus. A

match in the slave address must be made with the

address input in order to initiate communication

with the CAT5409.

RH, RL: Resistor End Points

The four sets of RH and RL pins are equivalent to

the terminal connections on a mechanical potenti-

ometer.

RW:

Wiper

The four RW pins are equivalent to the wiper

terminal of a mechanical potentiometer.

WP:

Write Protect Input

The

WP pin when tied low prevents non-volatile

writes to the data registers (change of wiper control

floating normal read/write operations are allowed.

See Write Protection on page 7 for more details.

DEVICE OPERATION

The CAT5409 is four resistor arrays integrated with 2-

wire serial interface logic, four 6-bit wiper control

registers and sixteen 6-bit, non-volatile memory data

registers. Each resistor array contains 63 separate

resistive elements connected in series. The physical

ends of each array are equivalent to the fixed terminals

of a mechanical potentiometer (RH and RL). RH and RL

are symmetrical and may be interchanged. The tap

positions between and at the ends of the series resistors

are connected to the output wiper terminals (RW) by a

CMOS transistor switch. Only one tap point for each

potentiometer is connected to its wiper terminal at a

time and is determined by the value of the wiper control

registers or the non-volatile memory data registers via

the 2-wire bus. Additional instructions allows data to be

transferred between the wiper control registers and

each respective potentiometer's non-volatile data

registers. Also, the device can be instructed to operate

in an "increment/decrement" mode.

CAT5409 датащи(PDF) 2 Page - Catalyst Semiconductor

CAT5409 датащи(HTML) 2 Page - Catalyst Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

датащи скачать

ссылки URL