AD5761/AD5721

Data Sheet

Rev. C | Page 26 of 31

READBACK CONTROL REGISTER

The readback control register operation provides the contents of the control register by setting the register address to 1100. Table 14

outlines the 24-bit shift register for this command, where the last 16 bits are don’t care bits.

During the next command, the control register contents are shifted out of the SDO pin with the MSB shifted out first. Table 15 outlines

the 24-bit data read from the SDO pin, where DB23 is the first bit shifted out.

Table 14. Readback Control Register, 24-Bit Shift Register to the SDI Pin

MSB

LSB

DB[23:21]

DB20

DB[19:16]

DB[15:10]

0

Register address

Register data

0

1100

Don’t care

Table 15. Readback Control Register, 24-Bit Data Read from the SDO Pin

MSB

LSB

DB[23:21]

DB20

DB[19:16]

DB[15:13]

DB12

DB11

DB[10:9]

DB8

DB7

DB6

DB5

DB[4:3]

DB[2:0]

0

Register address

Register data

0

1100

SC

BO

CV[1:0]

OVR

B2C

ETS

PV[1:0]

RA[2:0]

Table 16. Readback Control Register Bit Descriptions

Bit Name

Description

SC

Short-circuit condition. The SC bit is reset at every control register write.

0: no short-circuit condition detected.

1: short-circuit condition detected.

BO

Brownout condition. The BO bit is reset at every control register write.

0: no brownout condition detected.

1: brownout condition detected.

UPDATE DAC REGISTER FROM INPUT REGISTER

The update DAC register function loads the DAC register with the data saved in the input register, and updates the DAC output voltage.

This operation is equivalent to a software LDAC. Table 17 outlines how data is written to the DAC register.

Table 17. Update DAC Register from Input Register

MSB

LSB

DB23

DB22

DB21

DB20

DB19

DB18

DB17

DB16

DB15 to DB0

0

Register address

Register data

0

0010

Don’t care

READBACK DAC REGISTER

The readback DAC register operation provides the contents of the DAC register by setting the register address to 1011. Table 18 outlines

the 24-bit shift register for this command. During the next command, the DAC register contents are shifted out of the SDO pin with the

MSB shifted out first. Table 19 outlines the 24-bit data read from the SDO pin, where DB23 is the first bit shifted out.

Table 18. Readback DAC Register, 24-Bit Shift Register to SDI Pin

MSB

LSB

DB23

DB22

DB21

DB20

DB19

DB18

DB17

DB16

DB15 to DB0

0

Register address

Register data

0

1011

Don’t care