UB280 datasheet(5/9 Pages) UTC

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UB280

Preliminary

CMOS IC

UNISONIC TECHNOLOGIES CO., LTD

5 of 9

www.unisonic.com.tw

QW-R128-003.a

OPERAT I ON

1. Over charge detector

In the state of charging the battery, it will detect the overcharge state of the battery if the VDD terminal voltage

becomes higher than the overcharge detection voltage (VDET1). And then the CO terminal turns to low level, so the

external charging control Nch MOSFET turns OFF and it forbids to charge the battery.

After detecting overcharge, it will release the overcharge state if the VDD terminal voltage becomes lower than the

overcharge release voltage (VREL1). And then the CO terminal turns to high level, so the external charging control

Nch MOS FET turns ON, and it accepts to charge the battery.

When the VDD terminal voltage is higher than the overcharge detection voltage, to disconnect the charger and

connect the load, leave the CO terminal low level, but it accepts to conduct load current via the paracitical body

diode of the external Nch MOSFET. And then if the VDD terminal voltage becomes lower than the overcharge

detection voltage, the CO terminal turns to high level, so the external Nch MOSFET turn ON, and it accepts to

charge the battery.

The overcharge detection and release have delay time decided internally. When the VDD terminal voltage becomes

higher than the overcharge detection voltage, it will not detect overcharge, if the VDD terminal voltage becomes lower

than the overcharge detection voltage again within the overcharge detection delay time. And in the state of

overcharge, when the VDD terminal voltage becomes lower than the overcharge release voltage, it will not release

overcharge, if the VDD terminal voltage backs higher than the overcharge release voltage again within the overcharge

release delay time.

The output driver stage of the CO terminal includes a level shifter, so it will output the VM terminal voltage as low

level. The output type of the CO terminal is CMOS output between VDD and VM terminal voltage.

2. Over discharge detector

In the state of discharging the battery, it will detect the overdischarge state of the battery If the VDD terminal

becomes lower than the overdischarge detection voltage (VDET2). And then the DO terminal turns to low level, so the

external discharging control Nch MOSFET turn OFF and it forbids to discharge the battery.

Once overdischarge has been detected, overdischarge is released and the DO output becomes high level, if the

voltage of the battery rises more than the overdischarge detection voltage with connecting the charger, or more than

the overdischarge release voltage without connecting the charger. Charging current is supplied through a parasitic

diode of Nch MOSFET when the VDD terminal voltage is below the overdischarge detection voltage to the connection

of the charger, and the DO terminal enters the state which can be discharged by becoming high level, and turning on

Nch MOSFET when the VDD terminal voltage rises more than the overdischarge detection voltage.

When the battery voltage is about 0V, the CO terminal outputs high level and it accepts to conduct charging

current, if the charger voltage is higher than the minimum operating voltage for 0V charging.

The overdischarge detection have delay time decided internally. When the VDD terminal voltage becomes lower

than the overdischarge detection voltage, it will not detect overdischarge, if the VDD terminal voltage becomes higher

than the overdischarge detection voltage again within the overdischarge detection delay time. Moreover, the

overdischarge release delay time exists, too.

All the circuits are stopped, and after the overdischarge is detected, it is assumed the state of the standby, and

decreases the current (standby current) which IC consumes as much as possible (When VDD=2V, Max.0.5uA).

The output type of the DO terminal is CMOS output between VDD and VSS terminal voltage.

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