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AD8315 датащи(PDF) 2 Page - Analog Devices

номер детали AD8315
подробное описание детали  50 dB GSM PA Controller
PDF  20 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD8315 датащи(HTML) 2 Page - Analog Devices

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REV. B
–2–
AD8315–SPECIFICATIONS (V
S = 2.7 V, T = 25 C, 52.3
termination on RFIN, unless otherwise noted.)
Parameter
Conditions
Min
Typ
Max
Unit
OVERALL FUNCTION
Frequency Range
1
To Meet All Specifications
0.1
2.5
GHz
Input Voltage Range
±1 dB Log Conformance, 0.1 GHz
–57
–11
dBV
Equivalent dBm Range
–44
+2
dBm
Logarithmic Slope
2
0.1 GHz
21.5
24
25.5
mV/dB
Logarithmic Intercept
2
0.1 GHz
–79
–70
–64
dBV
Equivalent dBm Level
–66
–57
–51
dBm
RF INPUT INTERFACE
Pin RFIN
Input Resistance
3
0.1 GHz
2.8
k
W
Input Capacitance
3
0.1 GHz
0.9
pF
OUTPUT
Pin VAPC
Minimum Output Voltage
VSET
£ 200 mV, ENBL High
0.25
0.27
0.3
V
ENBL Low
0.02
V
Maximum Output Voltage
RL
≥ 800 W
2.45
2.6
V
vs. Temperature
4
85
∞C, VPOS =3 V, IOUT =6 mA
2.54
V
General Limit
2.7 V
£ VPOS £ 5.5 V, RL = •
VPOS – 0.1
V
Output Current Drive
Source/Sink
5/200
mA/
mA
Output Buffer Noise
25
nV
÷Hz
Output Noise
RF Input = 2 GHz, 0 dBm, fNOISE = 100 kHz,
130
nV/
÷Hz
CFLT = 220 pF
Small Signal Bandwidth
0.2 V to 2.6 V Swing
30
MHz
Slew Rate
10%–90%, 1.2 V Step (VSET), Open Loop
5
13
V/
ms
Response Time
FLTR = Open, Refer to TPC 24
150
ns
SETPOINT INTERFACE
Pin VSET
Nominal Input Range
Corresponding to Central 50 dB
0.25
1.4
V
Logarithmic Scale Factor
43.5
dB/V
Input Resistance
100
k
W
Slew Rate
16
V/
ms
ENABLE INTERFACE
Pin ENBL
Logic Level to Enable Power
1.8
VPOS
V
Input Current when Enable High
20
mA
Logic Level to Disable Power
0.8
V
Enable Time
Time from ENBL High to VAPC within 1% of
4
5
ms
Final Value, VSET
£ 200 mV, Refer to TPC 21
Disable Time
Time from ENBL Low to VAPC within 1% of
8
9
ms
Final Value, VSET
£ 200 mV, Refer to TPC 21
Power-On/Enable Time
Time from VPOS/ENBL High to VAPC within
2
3
ms
1% of Final Value, VSET
£ 200 mV, Refer to
TPC 26
Time from VPOS/ENBL Low to VAPC within
100
200
ns
1% of Final Value, VSET
£ 200 mV, Refer to
TPC 26
POWER INTERFACE
Pin VPOS
Supply Voltage
2.7
5.5
V
Quiescent Current
ENBL High
8.5
10.7
mA
Over Temperature
–30
∞C £ TA £ +85∞C12.9
mA
Disable Current
6
ENBL Low
4
10
mA
Over Temperature
–30
∞C £ TA £ +85∞C13
mA
NOTES
1Operation down to 0.02 GHz is possible.
2Mean and Standard Deviation specifications are available in Table I.
3See TPC 9 for plot of Input Impedance vs. Frequency.
4This parameter is guaranteed but not tested in production. Limit is –3 sigma from the mean.
5Response time in a closed-loop system will depend upon the filter capacitor (C
FLT) used and the response of the variable gain element.
6This parameter is guaranteed but not tested in production. Maximum specified limit on this parameter is the +6 sigma value.
Specifications subject to change without notice.



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