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 2004 Semtech Corp.

www.semtech.com

SC4211

POWER MANAGEMENT

Thermal Considerations

The power dissipation in the SC4211 is approximately equal

to the product of the output current and the input to out-

put voltage differential:

()

O

D

I

VOUT

VIN

P

•

−

≈

The absolute worst-case dissipation is given by:

()

Q(MAX)

(MAX)

O(MAX)

(MIN)

(MAX)

D(MAX)

I

VIN

I

VOUT

VIN

P

•

+

•

−

=

For a typical scenario, V

I

V

Thus P

Using this figure, and assuming T

culate the maximum thermal impedance allowable to main-

tain T

C/W

110

.722

70

150

P

T

T

R

D(MAX)

A(MAX)

J(MAX)

A)(MAX)

TH(J

°

=

−

=

−

=

−

This should be achievable for the SOIC-8EDP package

using PCB copper area to aid in conducting the heat away,

such as one square inch of copper connected to the ground

pins of the device. Internal ground/power planes and air

flow will also assist in removing heat. For higher ambient

temperatures it may be necessary to use additional cop-

per area.

Introduction

The SC4211 is intended for applications where high cur-

rent capability and very low dropout voltage are required.

It provides a very simple, low cost solution that uses very

little PCB real estate. Additional features include an en-

able pin to allow for a very low power consumption standby

mode, and a fully adjustable output.

Component Selection

Input capacitor: A large bulk capacitance of about 100uF

should be closely placed to the input supply pin of the

SC4211 to ensure that Vin does not sag below 1.4V. Also a

minimum

of

4.7µF

ceramic

capacitor

is

recommended to be placed directly next to the Vin pin.

This

allows

for

the

device

being

some

distance from any bulk capacitance on the rail.

Additionally, input droop due to load transients is reduced,

improving load transient response. Additional capacitance

may be added if required by the application.

Output capacitor: a minimum bulk capacitance of 10µF,

along with a 0.1µF ceramic decoupling capacitor is

recommended. Increasing the bulk capacitance will

improve the overall transient response. The use of

multiple lower value ceramic capacitors in parallel to

achieve the desired bulk capacitance will not cause

stability issues. Although designed for use with ceramic

output capacitors, the SC4211 is extremely tolerant of out-

put capacitor ESR values and thus will also work

comfortably with tantalum output capacitors.

Noise immunity: in very electrically noisy environments, it

is recommended that 0.1µF ceramic capacitors be placed

from IN to GND and OUT to GND as close to the device pins

as possible.

External voltage selection resistors: the use of 1%

resistors, and designing for a current flow

≥ 10µA is

recommended to ensure a well regulated output (thus R2

≤ 120kΩ).

Applications Information