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AM6548 датащи(PDF) 104 Page - Texas Instruments

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номер детали AM6548
подробное описание детали  Sitara Processors
PDF  299 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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AM6548 датащи(HTML) 104 Page - Texas Instruments

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Copyright © 2017–2018, Texas Instruments Incorporated
Terminal Configuration and Functions
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Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527
104
AM6548, AM6528, AM6546
AM6526, AM6527
SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018
www.ti.com
4.4
Pin Multiplexing
Table 4-75 describes the device pin multiplexing associated with pins.
NOTE
Many device pins support multiple signal functions. Some signal functions are selected via a single layer of multiplexers associated with
pins. Other signal functions are selected via two or more layers of multiplexers, where one layer is associated with the pins and other
layers are associated with peripheral logic functions.
Table 4-75, Pin Multiplexing only describes signal multiplexing at the pins. For more information, related to signal multiplexing at the pins,
see section Pad Configuration Registers in section Control Module (CTRL_MMR) of chapter Device Configuration of the Device TRM.
Refer to the respective peripheral chapter of the Device TRM for information associated with peripheral signal multiplexing.
NOTE
When a pad is set into a pin multiplexing mode which is not defined, that pad’s behavior is undefined. This should be avoided.
NOTE
Table 4-75, Pin Multiplexing does not include SerDes signal functions. For more information, refer to the Serializer/Deserializer (SerDes)
chapter in the Device TRM.
NOTE
The PRU_ICSSG contains a second layer of multiplexing to enable additional functionality on the PRU GPO and GPI signals. This
internal wrapper multiplexing is described in the PRU_ICSSG chapter in the device TRM.
For more information on the I/O cell configurations, see section Pad Configuration Registers in section Control Module (BOOT_CFG) of chapter
Device Configuration of the Device TRM.
Table 4-75. Pin Multiplexing
ADDRESS
REGISTER NAME
BALL
NUMBER
MUXMODE[7:0] SETTINGS
0
1
2
3
4
5
6
7
Bootstrap
0x0011C000
PADCONFIG0
M27
GPMC0_AD0
VOUT1_DATA0
VIN0_DATA12
GPIO0_0
BOOTMODE00
0x0011C004
PADCONFIG1
M23
GPMC0_AD1
VOUT1_DATA1
VIN0_DATA13
GPIO0_1
BOOTMODE01
0x0011C008
PADCONFIG2
M28
GPMC0_AD2
VOUT1_DATA2
VIN0_DATA14
GPIO0_2
BOOTMODE02
0x0011C00C
PADCONFIG3
M24
GPMC0_AD3
VOUT1_DATA3
VIN0_DATA15
GPIO0_3
BOOTMODE03
0x0011C010
PADCONFIG4
N24
GPMC0_AD4
VOUT1_DATA4
GPIO0_4
BOOTMODE04
0x0011C014
PADCONFIG5
N27
GPMC0_AD5
VOUT1_DATA5
GPIO0_5
BOOTMODE05



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