MPC9817

Rev 1, 11/2004

Freescale Semiconductor

Technical Data

© Freescale Semiconductor, Inc., 2004. All rights reserved.

Clock Generator for PowerQUICC

and PowerPC Microprocessors and

Microcontrollers

The MPC9817 is a PLL-based clock generator specifically designed for

Freescale Semiconductor Microprocessor and Microcontroller applications

including the PowerPC and PowerQUICC. This device generates the

microprocessor input clock and other microprocessor system and bus clocks at

any one of four output frequencies. These frequencies include the popular

33- and 66-MHz PCI bus frequencies. The device offers five low-skew clock

outputs plus three reference outputs. The clock input reference is 25 MHz and

may be derived from an external source or by the addition of a 25-MHz crystal to

the on-chip crystal oscillator. The extended temperature range of the MPC9817

supports telecommunication and networking requirements.

Features

•

5 LVCMOS outputs for processor and other system circuitry

•

3 Buffered 25-MHz reference clock outputs

•

Crystal oscillator or external reference input

•

25-MHz input reference frequency

•

Selectable output frequencies include: 25, 33, 50, or 66 MHz

•

Low cycle-to-cycle and period jitter

•

Package: 20-lead SSOP

•

3.3-V supply

•

Supports computing, networking, and telecommunications applications

•

Ambient temperature range: –40°C to +85°C

Functional Description

The MPC9817 uses a PLL with a 25-MHz input reference frequency to generate a single bank of five configurable LVCMOS

output clocks. The output frequency of this bank is configurable to either 25, 33, 50, or 66 MHz by two FSEL pins. The 25-MHz

reference may be either an external frequency source or a 25-MHz crystal. The 25-MHz crystal is directly connected to the

XTAL_IN and XTAL_OUT pins with no additional components required. An external reference may be applied to the XTAL_IN

pin with the XTAL_OUT pin left floating. The input reference, whether provided by a crystal or an external input, is also directly

buffered to a second bank of three LVCMOS outputs. These outputs may be used as the clock source for processor I/O

applications such as an Ethernet PHY. When FSEL0 and FSEL1 are both configured low, the QA outputs are directly fed from

the input reference providing a total of eight low-skew 25-MHz outputs. For all other combinations of FSEL0 and FSEL1 the

single-ended LVCMOS outputs provide five low-skew outputs for use in driving a microprocessor or microcontroller clock input

as well as other system components.

The MPC9817 is packaged in a 20-lead SSOP package.

MPC9817

MICROPROCESSOR

CLOCK GENERATOR

EN SUFFIX

20 SSOP PACKAGE

Pb-FREE PACKAGE

CASE 1461-01

SD SUFFIX

20 SSOP PACKAGE

CASE 1461-01