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AD9558BCPZ датащи(PDF) 2 Page - Analog Devices

номер детали AD9558BCPZ
подробное описание детали  Quad Input Multiservice Line Card Adaptive Clock Translator with Frame Sync
PDF  105 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9558BCPZ датащи(HTML) 2 Page - Analog Devices

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AD9558
Data Sheet
Rev. C | Page 2 of 105
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
Specifications..................................................................................... 5
Supply Voltage............................................................................... 5
Supply Current.............................................................................. 5
Power Dissipation......................................................................... 6
Logic Inputs (SYNC, RESET, PINCONTROL, M7 to M0).......6
Logic Outputs (M7 to M0, IRQ) ................................................ 7
System Clock Inputs (XOA, XOB) ............................................. 7
Reference Inputs ........................................................................... 8
Reference Monitors ...................................................................... 9
Reference Switchover Specifications.......................................... 9
Distribution Clock Outputs ...................................................... 10
Time Duration of Digital Functions ........................................ 11
Digital PLL .................................................................................. 12
Digital PLL Lock Detection ...................................................... 12
Holdover Specifications............................................................. 12
Serial Port Specifications—SPI Mode...................................... 13
Serial Port Specifications—I2C Mode...................................... 14
Jitter Generation ......................................................................... 14
Absolute Maximum Ratings.......................................................... 17
ESD Caution................................................................................ 17
Pin Configuration and Function Descriptions........................... 18
Typical Performance Characteristics ........................................... 21
Input/Output Termination Recommendations.......................... 26
Getting Started ................................................................................ 27
Chip Power Monitor and Startup............................................. 27
Multifunction Pins at Reset/Power-Up ................................... 27
Device Register Programming Using a Register Setup File .....27
Register Programming Overview............................................. 28
Theory of Operation ...................................................................... 31
Overview...................................................................................... 31
Reference Clock Inputs.............................................................. 32
Reference Monitors .................................................................... 32
Reference Profiles ....................................................................... 32
Reference Switchover ................................................................. 32
Digital PLL (DPLL) Core .......................................................... 33
Loop Control State Machine..................................................... 36
System Clock (SYSCLK)................................................................ 37
System Clock Inputs................................................................... 37
System Clock Multiplier............................................................ 37
Output PLL (APLL) ....................................................................... 39
Clock Distribution.......................................................................... 40
RF Dividers (RF Divider 2 and RF Divider 1)........................ 40
Channel Dividers........................................................................ 40
Output Power-Down ................................................................. 40
Output Enable............................................................................. 40
Output Mode .............................................................................. 40
Clock Distribution Synchronization........................................ 41
Frame Synchronization.................................................................. 42
Reference Configuration in Frame Synchronization Mode.... 42
Clock Outputs in Frame Synchronization Mode................... 42
Control Registers for Frame Synchronization Mode............. 42
Level Sensitive Mode and One-Shot Mode............................. 42
M3b Divider/OUT5 Programming in Frame Synchronization
Mode ............................................................................................ 43
Status and Control.......................................................................... 44
Multifunction Pins (M7 to M0) ............................................... 44
Watchdog Timer......................................................................... 45
EEPROM ..................................................................................... 45
Serial Control Port ......................................................................... 51
SPI/I²C Port Selection................................................................ 51
SPI Serial Port Operation.......................................................... 51
I²C Serial Port Operation.......................................................... 55
Programming the I/O Registers ................................................... 58
Buffered/Active Registers.......................................................... 58
Autoclear Registers..................................................................... 58
Register Access Restrictions...................................................... 58
Thermal Performance.................................................................... 59
Power Supply Partitions................................................................. 60
Recommended Configuration for 3.3 V Switching Supply..... 60
Configuration for 1.8 V Supply ................................................ 60
Pin Program Function Description ............................................. 61
Overview of On-Chip ROM Features ..................................... 61
Hard Pin Programming Mode.................................................. 62
Soft Pin Programming Overview............................................. 63
Register Map ................................................................................... 64



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