FSA832 datasheet(4/11 Pages) ONSEMI

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FSA832 • Rev. 1.0.1

Table 1.

Functionality

Device Detected

GOOD_

BAT

SW_OP

CHG_

AL_N

CHG_

DET

DP_HOST

DM_HOST

DP_CON DM_CON

DCP

Hi-Z

LOW

HIGH

Hi-Z

VDP_SRC

(2)

Hi-Z

(2)

Proprietary Charger

Hi-Z

LOW

HIGH

Hi-Z

CDP

HIGH

LOW

HIGH

DP_CON

DM_CON

DP_HOST DM_HOST

CDP

LOW

Hi-Z

LOW

HIGH

Hi-Z

VDP_SRC

Hi-Z

PS/2 Ports

(3)

Hi-Z

LOW

Hi-Z

SDP

HIGH

LOW

DP_CON

DM_CON

DP_HOST DM_HOST

SDP

LOW

Hi-Z

LOW

Hi-Z

VDP_SRC

Hi-Z

SDP, CDP, or DCP plugged

in and after 30-minute timer

expires

LOW

Hi-Z

LOW

Hi-Z

VBUS < VBUS valid to VBUS >

VBUS valid operation prior to

completing detection of

SDP, CDP, or DCP. Upon

detection, all outputs switch

as in rows above.

Hi-Z

Hi-Z to

LOW

Hi-Z

Note:

Hi-Z is the internal state of DM_CON. Since a DCP has been detected, DM_CON is shorted to DP_CON externally and

DM_CON is shorted to VDP_SRC. VDP_SRC is not put on DP_CON for proprietary chargers.

DP_CON and DM_CON are pulled to VBUS through a resistor by the PS/2 port when it is connected to the FSA832.

Functional Description

Data Contact Detect (DCD)

DCD relies on the D+ and D- lines being present. DCD waits

until the internal timeout tDCD_TOUT has expired in the

following cases:

 If a charger does not have a D+ pin on the USB connector;

 If the D+ pin is not shorted to D- pin on the connector,

 If D+ is pulled up to a supply; or

 If D+ does not have a sufficient path to ground to defeat a

pull-up IDP_SRC (IDP_SRC) current source.

The FSA832 proceeds with charger detection even though it

is unlikely that a charger is present. If there is no charge, the

algorithm reports an SDP and closes the switch. If a device

is pulling D+ HIGH, this voltage presents itself to the USB

transceiver or Physical Layer Interface (PHY) block within a

System on Chip (SoC) after the switch is closed.

If the DCD timeout is insufficient and the PHY block is so

equipped, DCD and the charging algorithm can be repeated

in the PHY block. The stipulation is that the total time from

VBUS valid to USB transceiver connection with a 1.5 k

Ω pull-

up to 3.3 V must be one (1) second, per USB 2.0 standards,

provided the portable device does not have a dead battery.

CHG_AL_N Output and Output Timing

CHG_AL_N output indicates that charge is allowed to be

drawn from VBUS when CHG_AL_N is LOW. When the

FSA832 first powers up and prior to detection, the

CHG_AL_N pin can follow VBUS up to 28 V, which is the

absolute maximum VBUS voltage allowed. Whenever VBUS is

at GND, the FSA832 is completely off and the switches and

all I/Os are in the Hi-Z state. When VBUS climbs above the

valid VBUS threshold, detection occurs automatically and

CHG_DET, SW_OPEN, and CHG_AL_N all simultaneously

switch to the states indicated in Table 1 if GOOD_BAT is

HIGH

(see

Dead

Battery

Provision

description

for

GOOD_BAT = LOW).

Dead Battery Provision

BC1.2 and USB 2.0 allow a portable device (defined as a

device with a battery) with a dead battery to take a maximum

of 100 mA from the USB VBUS line for a maximum of 45

minutes as long as the portable device forces the D+ line to

VDP_SRC. The FSA832 starts detection when VBUS crosses the

VBUSVLD threshold and, if it detects a CDP or SDP and

GOOD_BAT is HIGH, automatically closes the switch and

does not force the DP_CON pin to VDP_SRC.

Once charger detection is complete, the FSA832 starts a 30-

minute timer and forces the DP_CON pin to VDP_SRC until the

timer elapses. During the 30-minute period; if GOOD_BAT is

LOW, VDP_SRC is applied to DP_CON and the D+/D- switches

are opened. If GOOD_BAT is HIGH, VDP_SRC is not applied to

DP_CON and the D+/D- switches are closed. If GOOD_BAT

is LOW when the 30-minute timer expires; regardless of

whether a proprietary charger, SDP, CDP, or DCP was

previously detected; the FSA832 removes VDP_SRC from

DP_CON and forces CHG_DET LOW and CHG_AL_N to Hi-

Z (SW_OPEN remains in Hi-Z). To exit this fault condition,

remove VBUS, wait for all the VBUS Printed Circuit Board

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