WM8718

Production Data

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PD Rev 4.1 March 2004

14

REGISTER MAP

WM8718 uses a total of 4 program registers, which are 16-bits long.

These registers are all

loaded through input pin SDIN, using the 3-wire serial control mode as shown in 9.

A6

A5

A4

A3

A2

A1

A0

D8

D7

D6

D5

D4

D3

D2

D1

D0

M0

0

0

0

0

0

0

0

UPDATEL

LAT7

LAT6

LAT5

LAT4

LAT3

LAT2

LAT1

LAT0

M1

0

0

0

0

0

0

1

UPDATER

RAT7

RAT6

RAT5

RAT4

RAT3

RAT2

RAT1

RAT0

M2

0

0

0

0

0

1

0

ZCDINIT

ZEROFLR

0

1

0

1

0

1

0

1

PWDN DEEMPH

MUT

M3

0

0

0

0

0

1

1

0

1

REV

BCP

ATC

LRP

FMT[1]

FMT[0]

IWL[1]

IWL[0]

ADDRESS

DATA

Table 2 Mapping of Program Registers

Note:

1. These register bits must be written as 0 otherwise device function can not be guaranteed.

REGISTER

ADDRESS

(A3,A2,A1,A0)

BITS

NAME

DEFAULT

DESCRIPTION

[7:0]

LAT[7:0]

11111111 (0dB) Attenuation data for left channel in 0.5dB steps, see Table 5

0000

DACL

Attenuation

8

UPDATEL

0

Attenuation data load control for left channel.

0: Store DACL in intermediate latch (no change to output)

1: Store DACL and update attenuation on both channels.

[7:0]

RAT[7:0]

11111111 (0dB) Attenuation data for right channel in 0.5dB steps, see Table 5

0001

DACR

Attenuation

8

UPDATER

0

Attenuation data load control for right channel.

0: Store DACR in intermediate latch (no change to output)

1: Store DACR and update attenuation on both channels.

0

MUT

0

Left and Right DACs Soft Mute Control.

0: No mute

1: Mute

1

DEEMPH

0

De-emphasis Control.

0: De-emphasis off

1: De-emphasis on

2

PWDN

0

Left and Right DACs Power-down Control

0: All DACs running, output is active

1: All DACs in power saving mode, output muted

7

ZEROFLR

0

Zero Flag Pin Control.

0: Channel independent

1: AND of both channels on ZEROFL output pin

0010

Mode Control

8

ZCDINIT

0

Zero Cross Detect Control.

0: Zero cross detect enabled

1: Zero cross detect disabled

0011

Format

Control

[1:0]

IWL[1:0]

10

Input Word Length.

00: 16-bit mode

01: 20-bit mode

10: 24-bit mode

11: 32-bit mode(not supported in right justified mode)