Complete, 12-Bit, 45 MHz

CCD Signal Processor

Data Sheet

ADDI7100

Rev. E

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FEATURES

Pin-compatible upgrade for the AD9945

45 MHz correlated double sampler (CDS) with variable gain

6 dB to 42 dB, 10-bit variable gain amplifier (VGA)

Low noise optical black clamp circuit

Preblanking function

12-bit, 45 MHz ADC

No missing codes guaranteed

3-wire serial digital interface

3 V single-supply operation

Space-saving, 32-lead, 5 mm × 5 mm LFCSP

APPLICATIONS

Digital still cameras

Digital video camcorders

PC cameras

Portable CCD imaging devices

CCTV cameras

GENERAL DESCRIPTION

The ADDI7100 is a complete analog signal processor for charge-

coupled device (CCD) applications. It features a 45 MHz,

single-channel architecture designed to sample and condition

the outputs of interlaced and progressive scan area CCD arrays.

The signal chain for the ADDI7100 consists of a correlated double

sampler (CDS), a digitally controlled variable gain amplifier

(VGA), a black level clamp, and a 12-bit ADC.

The internal registers are programmed through a 3-wire serial

digital interface. Programmable features include gain adjustment,

black level adjustment, input clock polarity, and power-down

modes. The ADDI7100 operates from a single 3 V power supply,

typically dissipates 125 mW, and is packaged in a space-saving,

32-lead LFCSP.

FUNCTIONAL BLOCK DIAGRAM

DATACLK

SHD

SHP

BAND GAP

REFERENCE

DOUT

D0 TO D11

CCDIN

PBLK

REFT REFB

INTERNAL

TIMING

6dB TO 42dB

−3dB, 0dB,

+3dB, +6dB

AVDD

DVDD

DVSS

AVSS

DRVDD

DRVSS

10

DIGITAL

INTERFACE

SDATA

SCK

SL

CLPOB

12

CDS

VGA

CLP

ADDI7100

CONTROL

REGISTERS

12-BIT

ADC

VD

Figure 1.