TDA7419

20/30

6.1

Interface Protocol

The interface protocol comprises:

– a start condition (S)

– a chip address byte (the LSB determines read/write transmission)

– a subaddress byte

– a sequence of data (N-bytes + acknowledge)

– a stop condition (P)

– the max. clock speed is 500kbits/s

– 3.3V logic compatible

6.1.1 Receive Mode

S = Start

R/W =

"0" -> Receive Mode (Chip can be programmed by

µP)

"1" -> Transmission Mode (Data could be received by

µP)

ACK = Acknowledge

P = Stop

TS = Testing mode

AZ = Auto zero remain

AI = Auto increment

6.1.2 Transmission Mode

SM = Soft mute activated for main channel

X = Not Used

The transmitted data is automatic updated after each ACK. Transmission can be repeated without new

chip address.

6.1.3 Reset Condition

A Power-On-Reset is invoked if the Supply-Voltage is below than 3.5V. After that the following data is writ-

ten automatically into the registers of all subaddresses:

S

1

0

0

0

1

0

0

R/W

ACK

TS

AZ

AI

A4

A3

A2

A1

A0

ACK

DATA

ACK

P

S

1

0

0

0

1

0

0

R/W

ACK

X

X

X

X

X

X

X

SM

ACK

P

MSB

LSB

11

1111

10