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TPA3138D2

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SLOS993A – MARCH 2018 – REVISED JUNE 2018

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9.3 Feature Description

9.3.1

Analog Gain

The analog gain of the TPA3138D2 can be changed by GAIN_SEL pin. Low Level, Gain = 20 dB; High Level,

Gain = 26 dB.

9.3.2

SD/FAULT Operation

absolute minimum level during periods of nonuse for power conservation. The SD/FAULT input pin should be

held high (see Specifications table for trip point) during normal operation when the amplifier is in use. Pulling

SD/FAULT low causes the outputs to mute and the amplifier to enter a low-current state. Never leave SD/FAULT

unconnected, because the amplifier operation would be unpredictable.

For the best power-off pop performance, place the amplifier in the shutdown mode prior to removing the power

supply voltage.

9.3.3 PLIMIT

If selected, the PLIMIT operation limits the output voltage level to a voltage level below the supply rail. If the

amplifier operates like it is powered by a lower supply voltage, then it limits the output power by voltage clipping.

Add a resistor divider from GVDD to ground to set the threshold voltage at the PLIMIT pin.

Figure 17. PLIMIT Circuit Operation

The PLIMIT circuit sets a limit on the output peak-to-peak voltage. The limiting is done by limiting the duty cycle

to a fixed maximum value. The limit can be thought of as a "virtual" voltage rail which is lower than the supply

connected to PVCC. The "virtual" rail is approximately 5.7 times (with BD mode) and 11.4 times (with 1SPW

mode) the voltage at the PLIMIT pin. The output voltage can be used to calculate the maximum output power for

a given maximum input voltage and speaker impedance.