M48T58 datasheet(18/27 Pages) STMICROELECTRONICS

18 / 27 page

M48T58, M48T58Y

18/27

Calibrating the Clock

The M48T58/Y is driven by a quartz-controlled os-

cillator with a nominal frequency of 32,768 Hz. The

devices are tested not to exceed 35 ppm (parts per

million) oscillator frequency error at 25°C, which

equates to about ±1.53 minutes per month. With

the calibration bits properly set, the accuracy of

each M48T58/Y improves to better than +1/–2

ppm at 25°C.

The oscillation rate of any crystal changes with

temperature (see Figure 12, page 19). Most clock

chips compensate for crystal frequency and tem-

perature shift error with cumbersome “trim” capac-

itors. The M48T58/Y design, however, employs

periodic counter correction. The calibration circuit

adds or subtracts counts from the oscillator divider

circuit at the divide by 256 stage, as shown in Fig-

ure 13, page 20. The number of times pulses are

blanked (subtracted, negative calibration) or split

(added, positive calibration) depends upon the

value loaded into the five calibration bits found in

the Control Register. Adding counts speeds the

clock up, subtracting counts slows the clock down.

The Calibration Byte occupies the five lower order

bits (D4-D0) in the Control Register 1FF8h. These

bits can be set to represent any value between 0

and 31 in binary form. Bit D5 is the Sign Bit; '1' in-

dicates positive calibration, '0' indicates negative

calibration. Calibration occurs within a 64 minute

cycle. The first 62 minutes in the cycle may, once

per minute, have one second either shortened by

128 or lengthened by 256 oscillator cycles. If a bi-

nary '1' is loaded into the register, only the first 2

minutes in the 64 minute cycle will be modified; if

a binary 6 is loaded, the first 12 will be affected,

and so on.

Therefore, each calibration step has the effect of

adding 512 or subtracting 256 oscillator cycles for

every 125,829,120 actual oscillator cycles, that is

+4.068 or –2.034 ppm of adjustment per calibra-

tion step in the calibration register. Assuming that

the oscillator is in fact running at exactly 32,768

Hz, each of the 31 increments in the Calibration

Byte would represent +10.7 or –5.35 seconds per

month which corresponds to a total range of +5.5

or –2.75 minutes per month.

Two methods are available for ascertaining how

much calibration a given M48T58/Y may require.

The first involves simply setting the clock, letting it

run for a month and comparing it to a known accu-

rate reference (like WWV broadcasts). While that

may seem crude, it allows the designer to give the

end user the ability to calibrate his clock as his en-

vironment may require, even after the final product

is packaged in a non-user serviceable enclosure.

All the designer has to do is provide a simple utility

that accesses the Calibration Byte.

The second approach is better suited to a manu-

facturing environment, and involves the use of

some test equipment. When the Frequency Test

(FT) Bit (D6 in the Day Register) is set to a '1,' and

D7 of the Seconds Register is a '0' (Oscillator Run-

ning), The Frequency Test (Pin 1) will toggle at

512Hz. Any deviation from 512 Hz indicates the

degree and direction of oscillator frequency shift at

the test temperature. For example, a reading of

512.01024 Hz would indicate a +20 ppm oscillator

frequency error, requiring a –10 (WR001010) to be

loaded into the Calibration Byte for correction.

The Frequency Test pin is an open drain output

which requires a pull-up resistor for proper opera-

tion. A 500-10k

Ω resistor is recommended in order

to control the rise time.

For more information on calibration, see Applica-

tion Note AN934, “TIMEKEEPER® Calibration.”

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