74LVC161284

2/11

LOGIC DIAGRAM

NOTE A:

PMOS transistor is turned off when the associated driver is in the low state.

NOTE B:

PIN DESCRIPTION

PIN No

SYMBOL

NAME AND FUNCTION

1

HD

High Drive Enable Input

2, 3, 4, 5, 6

A9 to A13

Side A Input

8, 9, 11, 12, 13, 14, 16, 17

A1 to A8

Side A Input or Output

19

PLI

Peripheral Logic Input

20, 21, 22, 23

A14 to A17

Side A Output

24

HLO

Host Logic Output

25

HLI

Host Logic Input

29, 28, 27, 26

C14 to C17

Side Cable Output

30

PLO

Peripheral Logic Output

41, 40, 38, 37, 36, 35, 33, 32

B1 to B8

Side Cable Input or Output

47, 46, 45, 44, 43

Y9 to Y13

Side Cable Output

48

DIR

Direction Control Input

10, 15, 34, 39

GND

Ground (0V)

7, 18

Positive Supply Voltage

31, 42

Cable Power Supply