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FT28HC256 датащи(PDF) 2 Page - Force Technologies Ltd

номер детали FT28HC256
подробное описание детали  5 Volt, Byte Alterable EEPROM
PDF  23 Pages
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производитель  FORCE [Force Technologies Ltd]
домашняя страница   https://www.forcetechnologies.co.uk
Logo FORCE - Force Technologies Ltd

FT28HC256 датащи(HTML) 2 Page - Force Technologies Ltd

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FT28HC256
Characteristics subject to change without notice.
2 of 23
REV 1.0
PIN CONFIGURATION
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
WE
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
FT28HC256
Plastic DIP
CERDIP
Flat Plastic
SOIC
A6
A5
A4
A3
A2
A1
A0
NC
I/O0
A8
A9
A11
NC
OE
A10
CE
I/O7
I/O6
4 3
2 1
32 31 30
14 15 16 17 18 19 20
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
LCC
PLCC
(Top View)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A 3
A 4
A 5
A 6
A 7
A 12
A 14
NC
VCC
NC
WE
A13
A 8
A 9
A11
OE
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A 2
A 1
A 0
I/O0
I/O1
I/O2
NC
VSS
NC
I/O3
I/O4
I/O5
I/O6
I/O7
CE
A10
FT28HC256
FT28HC256
11
I/O0
10
A0
14
VSS
9
A1
8
A2
7
A3
6
A4
5
A5
2
A12
28
VCC
12
I/O1
13
I/O2
15
I/O3
4
A6
3
A7
1
16
I/O4
20
CE
22
OE
24
A9
17
I/O5
27
WE
19
I/O7
21
A10
23
A11
25
A8
18
I/O6
26
A13
(Bottom View)
PGA
A14
FT28HC256
TSOP
PIN DESCRIPTIONS
Addresses (A0–A14)
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (CE)
The Chip Enable input must be LOW to enable all read/
write operations. When CE is HIGH, power consump-
tion is reduced.
Output Enable (OE)
The Output Enable input controls the data output b uff-
ers, and is used to initiate read operations.
Data In/Data Out (I/O0–I/O7)
Data is written to or read from the FT28HC256 through
the I/O pins.
Write Enable (WE)
The Write Enable input controls the writing of data to
the FT28HC256.
PIN NAMES
Symbol
Description
A0–A14
Address Inputs
I/O0–I/O7
Data Input/Output
WE
Write Enable
CE
Chip Enable
OE
Output Enable
VCC
+5V
VSS
Ground
NC
No Connect



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