X5001

FN8125 Rev 1.00

Page 13 of 20

May 30, 2006

Data Output Timing

Notes: (3) This parameter is periodically sampled and not 100% tested.

write cycle.

Figure 10. Data Output Timing

Figure 11. Data Input Timing

Symbol

Parameter

1.8V-3.6V

2.7V-5.5V

Unit

Min.

Max.

Min.

Max.

Clock frequency

0

1

0

2

MHz

Output disable time

400

200

ns

Output valid from clock low

400

200

ns

Output hold time

0

0

ns

Output rise time

300

150

ns

Output fall time

300

150

ns

SCK

CS

SO

SI

MSB Out

MSB–1 Out

LSB Out

ADDR

LSB IN

SCK

CS

SI

SO

MSB In

LSB In

High Impedance