LTC1799

3

High Level Output Voltage

q

4.8

4.95

V

q

4.5

4.8

V

q

2.7

2.9

V

q

2.2

2.6

V

Low Level Output Voltage

q

0.05

0.15

V

q

0.2

0.4

V

q

0.1

0.3

V

q

0.4

0.7

V

OUT Rise Time

14

ns

(Note 5)

7

ns

19

ns

11

ns

OUT Fall Time

13

ns

(Note 5)

6

ns

19

ns

10

ns

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

All voltages are with respect to GND.

Note 1: Absolute Maximum Ratings are those values beyond which the life

of the device may be impaired.

Note 2: Frequencies near 100kHz and 1MHz may be generated using two

section). For these frequencies, the error is specified under the following

includes drift over temperature and over supply.

Note 4: Jitter is the ratio of the peak-to-peak distribution of the period to

the mean of the period. This specification is based on characterization and

is not 100% tested.

Note 5: Output rise and fall times are measured between the 10% and

90% power supply levels. These specifications are based on

characterization.

must be kept free from noise and ripple. It should be

bypassed directly to a ground plane.

GND (Pin 2): Ground. Should be tied to a ground plane for

best performance.

SET (Pin 3): Frequency-Setting Resistor Input. The value

mines the oscillator frequency. The voltage on this pin is

voltage. For best performance, use a precision metal film

resistor with a value between 10k and 200k and limit the

capacitance on this pin to less than 2pF.

DIV (Pin 4): Divider-Setting Input. This three-state input

selects among three divider settings, determining the

value of N in the frequency equation. Pin 4 should be tied

PI FU CTIO S

to GND for the

÷1 setting, the highest frequency range.

Floating Pin 4 divides the master oscillator by 10. Pin 4

÷100 setting, the lowest

frequency range. To detect a floating DIV pin, the LTC1799

attempts to pull the pin toward midsupply. Therefore,

driving the DIV pin high requires sourcing approximately

5

µA. Likewise, driving DIV low requires sinking 5µA.

When floated, the DIV pin will be held near midsupply by

these current sources. When it is floated, it is recom-

mended that the DIV pin be bypassed by a 1nF capacitor

or surrounded by a ground shield to prevent excessive

coupling from other PCB traces.

OUT (Pin 5): Oscillator Output. This pin can easily drive

5k

Ω or 10pF loads. Larger loads may cause inaccuracies

due to supply bounce at high frequencies.