HIP6501A

FN4749 Rev 6.00

Page 10 of 14

December 30, 2004

Application Guidelines

Soft-Start Interval

The 5VSB output of a typical ATX supply is capable of

725mA. During power-up in a sleep state, it needs to provide

sufficient current to charge up all the output capacitors and

simultaneously provide some amount of current to the output

loads. Drawing excessive amounts of current from the 5VSB

output of the ATX can lead to voltage collapse and induce a

pattern of consecutive restarts with unknown effects on the

system’s behavior or health.

The built-in soft-start circuitry allows tight control of the slew-

up speed of the output voltages controlled by the HIP6501A,

thus enabling power-ups free of supply drop-off events.

Since the outputs are ramped up in a linear fashion, the

current dedicated to charging the output capacitors can be

calculated with the following formula:

, where

capacitance and the voltage of an output.

Due to the various system timing events, it is recommended

that the soft-start interval not be set to exceed 30ms.

Additionally, the recommended soft-start capacitor range

spans from 5nF up to 0.22

F (0.1F recommended).

Shutdown

In case of a FAULT condition that might endanger the

computer system, or at any other time, the HIP6501A can be

shut down by pulling the SS pin below the specified

shutdown level (typically 0.8V) with an open drain or open

collector device capable of sinking a minimum of 2mA.

Pulling the SS pin low effectively shuts down all the pass

elements. Upon release of the SS pin, the HIP6501A

undergoes a new soft-start cycle and resumes normal

operation in accordance to the ATX supply and control pins

status.

Layout Considerations

The typical application employing a HIP6501A is a fairly

straight-forward implementation. Similar to any other linear

regulators, attention has to be paid to a few potentially

sensitive small signal components, such as those connected

to high-impedance nodes or those supplying critical by-pass

currents.

The power components (pass transistors) and the controller

IC should be placed first. The controller should be placed in

a central position on the motherboard, closer to the memory

load if possible. Ensure the VSEN2 connection is properly

sized to carry 200mA without significant resistive losses. The

pass transistors should be placed on pads capable of

heatsinking, matching the device’s power dissipation. Where

applicable, multiple via connections to a large internal plane

can significantly lower localized device temperature rise.

Placement of the decoupling and bulk capacitors should

follow a placement reflecting their purpose. As such, the

placed as close as possible to the load they are decoupling;

the controller pins, the ones decoupling the load close to the

load connector or the load itself (if embedded). The bulk

-

+

CIRCUITRY DETAILS

FAULT/MSEL

40

A

MEM VOLTAGE

SELECT COMP

1k



10k



2.5V

3.3V

+

-

0.2V

ICOUT

ISS

CSS VBG



--------------------------------

OUT VOUT







=

FIGURE 12. PRINTED CIRCUIT BOARD ISLANDS

Q1

Q2

Q3

Q4

VIA CONNECTION TO GROUND PLANE

ISLAND ON POWER PLANE LAYER

ISLAND ON CIRCUIT/POWER PLANE LAYER

HIP6501A

SS

GND

VSEN2

5VDLSB

DRV2

3V3DLSB

KEY

12V

5VSB

DLA

Q5

5VDL

3V3DL