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LSF0102 датащи(PDF) 11 Page - Texas Instruments |
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LSF0102 датащи(HTML) 11 Page - Texas Instruments |
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11 / 18 page ![]() 11 LSF0102-Q1 www.ti.com SDLS969 – MAY 2018 Product Folder Links: LSF0102-Q1 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Typical Application (continued) (1) Vref_A is required to be the lowest voltage level across all inputs and outputs. Table 2. Application Operating Condition PARAMETER MIN TYP MAX UNIT Vref_A(1) reference voltage (A) 0.95 4.5 V Vref_B reference voltage (B) Vref_A + 0.8 5.5 V VI(EN) input voltage on EN pin Vref_A + 0.8 Vref_B 5.5 V Vpu pull-up supply voltage 0 Vref_B V (1) Calculated for VOL = 0.35 V (2) Assumes output driver VOL = 0.175 V at stated current (3) +10% to compensate for VDD range and resistor tolerance The 200 k Ω, pull-up resistor is required to allow Vref_B to regulate the EN input. A filter capacitor on Vref_B is recommended. Also Vref_B and VI(EN) are recommended to be 1.0 V higher than Vref_A for best signal integrity. 9.2.1.2 Detailed Design Procedure 9.2.1.2.1 Bidirectional Translation For the bidirectional clamping configuration (higher voltage to lower voltage or lower voltage to higher voltage), the EN input must be connected to Vref_B and both pins pulled to HIGH side Vpu through a pull-up resistor (typically 200 k Ω), as shown in Figure 7. This allows Vref_B to regulate the EN input. A filter capacitor on Vref_B is recommended. The master output driver can be push-pull or open-drain (pull-up resistors may be required) and the slave device output can be push-pull or open-drain (pull-up resistors are required to pull the Bn outputs to Vpu). If either output is push-pull, data must be unidirectional or the outputs must be tri-state and be controlled by some direction-control mechanism to prevent HIGH-to-LOW contention in either direction. If both outputs are open-drain, no direction control is needed. In Figure 7, the reference supply voltage (Vref_A) is connected to the processor core power supply voltage. When Vref_B is connected through a 200 k Ω resistor to a 3.3 V Vpu power supply, and Vref_A is set 1.2 V. The output of A1 has a maximum output voltage equal to Vref_A, and the bidirectional interface on channel 2 has a maximum output voltage equal to Vpu. 9.2.1.2.2 Pull-up Resistor Sizing To maintain an appropriate output low voltage, the pull-up resistor value should limit the current through the pass transistor when it is in the ON state to less than 15 mA. This ensures a pass voltage of 260 mV to 350 mV. To set the current through each pass transistor at 15 mA, the pull-up resistor value can be calculated using the following equation: Rpu = (Vpu – 0.35 V) / 0.015 A (1) The appropriate pull up resistor will depend on the current requirements of the application. Table 3 summarizes resistor values, reference voltages, and currents at 15 mA, 10 mA, and 3 mA. The resistor value shown in the +10% column (or a larger value) should be used to ensure that the pass voltage of the transistor is 350 mV or less. The external driver must be able to sink the total current from the resistors on both sides of the LSF0102- Q1 device at 0.175 V, although the 15 mA applies only to current flowing through the LSF0102-Q1. Table 3. Pull-up Resistor Values(1)(2) VDPU 15 mA 10 mA 3 mA NOMINAL (Ω) +10%(3) (Ω) NOMINAL (Ω) +10%(3) (Ω) NOMINAL (Ω) +10%(3) (Ω) 5 V 310 341 465 512 1550 1705 3.3 V 197 217 295 325 983 1082 2.5 V 143 158 215 237 717 788 1.8 V 97 106 145 160 483 532 1.5 V 77 85 115 127 383 422 1.2 V 57 63 85 94 283 312 |
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