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HIP6021 датащи(PDF) 14 Page - Renesas Technology Corp

номер детали HIP6021
подробное описание детали  Advanced PWM and Triple Linear Power Controller
PDF  15 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HIP6021 датащи(HTML) 14 Page - Renesas Technology Corp

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FN4684 Rev 1.00
Page 14 of 15
March 8, 2005
HIP6021
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
For additional products, see www.intersil.com/en/products.html
© Copyright Intersil Americas LLC 1999-2005. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
PWM MOSFET Selection and Considerations
In high-current PWM applications, the MOSFET power
dissipation, package selection and heatsink are the dominant
design factors. The power dissipation includes two loss
components; conduction loss and switching loss. These losses
are distributed between the upper and lower MOSFETs
according to duty factor (see the equations below). The
conduction losses are the main component of power
dissipation for the lower MOSFETs. Only the upper MOSFET
has significant switching losses, since the lower device turns
on and off into near zero voltage.
The equations below assume linear voltage-current transitions
and do not model power loss due to the reverse-recovery of
the lower MOSFET’s body diode. The gate-charge losses are
dissipated by the HIP6021 and don't heat the MOSFETs.
However, large gate-charge increases the switching time, tSW
which increases the upper MOSFET switching losses. Ensure
that both MOSFETs are within their maximum junction
temperature at high ambient temperature by calculating the
temperature rise according to package thermal-resistance
specifications. A separate heatsink may be necessary
depending upon MOSFET power, package type, ambient
temperature and air flow.
The rDS(ON) is different for the two equations above even if the
same device is used for both. This is because the gate drive
applied to the upper MOSFET is different than the lower
MOSFET. Figure 11 shows the gate drive where the upper
MOSFET’s gate-to-source voltage is approximately VCC less
the input supply. For +5V main power and +12VDC for the
bias, the gate-to-source voltage of Q1 is 7V. The lower gate
drive voltage is +12VDC. A logic-level MOSFET is a good
choice for Q1 and a logic-level MOSFET can be used for Q2 if
its absolute gate-to-source voltage rating exceeds the
maximum voltage applied to VCC.
Rectifier CR1 is a clamp that catches the negative inductor
swing during the dead time between the turn off of the lower
MOSFET and the turn on of the upper MOSFET. The diode
must be a Schottky type to prevent the lossy parasitic
MOSFET body diode from conducting. It is acceptable to omit
the diode and let the body diode of the lower MOSFET clamp
the negative inductor swing, but efficiency could drop one or
two percent as a result. The diode's rated reverse breakdown
voltage must be greater than the maximum input voltage.
Linear Controller Transistor Selection
The main criteria for selection of transistors for the linear
regulators is package selection for efficient removal of heat.
The power dissipated in a linear regulator is:
Select a package and heatsink that maintains the junction
temperature below the rating with a the maximum expected
ambient temperature.
When selecting bipolar NPN transistors for use with the linear
controllers, insure the current gain at the given operating VCE
is sufficiently large to provide the desired output load current
when the base is fed with the minimum driver output current.
PUPPER
IO
2
rDS ON

VOUT
VIN
------------------------------------------------------------
IO VIN
tSW
FS
2
----------------------------------------------------
+
=
PLOWER
IO
2
rDS ON

VIN VOUT
–

VIN
---------------------------------------------------------------------------------
=
FIGURE 11. UPPER GATE DRIVE - DIRECT VCC DRIVE OPTION
+12V
PGND
HIP6021
GND
LGATE
UGATE
PHASE
VCC
+5V OR LESS
NOTE:
NOTE:
VGS VCC
Q1
Q2
+
-
VGS VCC -5V
CR1
PLINEAR
IO VIN VOUT
–

=



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