MP6536 - 26V, 5.5A 3-CHANNEL POWER HALF-BRIDGE

MP6536 Rev. 1.01

www.MonolithicPower.com

5

5/3/2018

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PIN FUNCTIONS

Pin #

Name

Description

1,2

SW2

Output 2. SW2 is valid approximately 100µs after VSP goes high.

3,4,5

VSP

Power Supply Input. Connect VSP to the positive side of the input power supply. Bypass

VSP to PGND as close to the IC as possible.

6,7

SW1

Output 1. SW1 is valid approximately 100µs after VSP goes high.

8,9

LS1

Low-Side Source Connection of SW1.

10

BST1

Bootstrap Supply. BST1 powers the high-side gate of the SW1 stage. Connect a

capacitor (

0.1μF or greater) between BST1 and SW1.

11

NC

No Connection. NC

MUST be kept floating.

12

PWM1

Driver Logic Input 1. Drive PWM1 with the signal that controls SW1. Drive PWM high to

turn on the high-side switch; drive PWM low to turn on the low-side switch.

13

PWM2

Driver Logic Input 2. Drive PWM2 with the signal that controls SW2. Drive PWM high to

turn on the high-side switch; drive PWM low to turn on the low-side switch.

14

FAULTB Fault Output. A low output at FAULT indicates that the MP6536 has detected an over-

temperature, over-current, or under-voltage condition. FAULTB is an open-drain output.

15

SHDNB

Shutdown Input. When SHDNB is low, the IC shuts off.

16

PWM3

Driver Logic Input 3. Drive PWM3 with the signal that controls SW3. Drive PWM high to

turn on the high-side switch; drive PWM low to turn on the low-side switch.

17

STBYB

Standby Input. Default low (internal pull-down). If driven high, the output of the driver is

determined by PWM1/2/3. If driven low, all outputs are high impedance.

18

AGND

Analog Ground.

19

FLT3B

Fault Monitor. For details see the

“Fault Output” section. FLT3B is an open-drain output.

20

FLT2B

Fault Monitor. For details see the

“Fault Output” section. FLT2B is an open-drain output.

21

NC

No Connection. NC MUST be kept floating.

22, 23

PGND

Power Ground. Connect the exposed pad on the bottom side to ground plane.

24, 25

NC

No Connection. NC MUST be kept floating.

26,27,

28

VSP

Power Supply Input. Connect VSP to the positive side of the input power supply. Bypass

VSP to PGND as close to the IC as possible.

29, 30

SW3

Output 3. SW3 is valid approximately 100µs after VSP goes high.