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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AMD8513 датащи(PDF) 49 Page - Infineon Technologies AG |
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AMD8513 датащи(HTML) 49 Page - Infineon Technologies AG |
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49 / 88 page  Data Sheet 49 Rev. 1.21, 2005-12-05 ADM8513 Data Sheet Registers Description Transmit Status 2 Receive Status TS2 Offset Reset Value Transmit Status 2 2CH 00H Field Bits Type Description TXFF 7 r TX Fifo Full Set by HW to indicate tx fifo full. Clear this register by SW Read or after EP3 is accessed. TXFE 6 r TX Fifo Empty Set by HW to indicate tx fifo empty. Clear this register by SW Read or after EP3 is accessed. TXPC 3:0 r TX Packet Count Set by HW to indicate Ethernet transmit packet counts every interrupt EP polling. If more than 15 packets have been transmitted, this value will stay as 15. Clear by SW read or after EP3 is accessed. RS Offset Reset Value Receive Status 2DH 00H Field Bits Type Description RXP 1 r RX Pause Set by HW to indicate a PAUSE frame is received. Clear this register by SW Read or after EP3 is accessed. RXO 0 r RX Overflow Set by HW to indicate external SRAM overflow. Clear this register by SW Read or after EP3 is accessed. |
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