HIP6503

FN4882 Rev 5.00

Page 11 of 14

July 21, 2005

high-frequency decoupling capacitors should be placed as

close as possible to the load they are decoupling; the ones

decoupling the controller close to the controller pins, the

ones decoupling the load close to the load connector or the

load itself (if embedded). Even though bulk capacitance

(aluminum electrolytics or tantalum capacitors) placement is

not as critical as the high-frequency capacitor placement,

having these capacitors close to the load they serve is

preferable.

The critical small signal components include the soft-start

of the control IC, and connect them to ground through a via

placed close to the ground pad. Minimize any leakage

current paths from these nodes, since the internal current

sources are only 10s of microamperes (10

A to 40A).

A multi-layer printed circuit board is recommended. Figure

10 shows the connections of most of the components in the

converter. Note that the individual capacitors shown each

could represent numerous physical capacitors. Dedicate one

solid layer for a ground plane and make all critical

component ground connections through vias placed as close

to the component terminal as possible. Dedicate another

solid layer as a power plane and break this plane into

smaller islands of common voltage levels. Ideally, the power

plane should support both the input power and output power

nodes. Use copper filled polygons on the top and bottom

circuit layers to create power islands connecting the filtering

components (output capacitors) and the loads. Use the

remaining printed circuit layers for small signal wiring.

Component Selection Guidelines

Output Capacitors Selection

The output capacitors for all outputs should be selected to

allow the output voltage to meet the dynamic regulation

requirements of active state operation (S0, S1). The load

transient for the various microprocessor system’s

components may require high quality capacitors to supply

the high slew rate (di/dt) current demands. Thus, it is

recommended that the output capacitors be selected for

transient load regulation, paying attention to their parasitic

components (ESR, ESL).

Also, during the transition between active and sleep states,

there is a short interval of time during which none of the

power pass elements are conducting - during this time the

output capacitors have to supply all the output current. The

output voltage drop during this brief period of time can be

easily approximated with the following formula:

, where

The output voltage drop is heavily dependent on the ESR

(equivalent series resistance) of the output capacitor bank,

the choice of capacitors should be such as to maintain the

output voltage above the lowest allowable regulation level.

loop stability. Figure 11 outlines a capacitance vs. equivalent

series resistance envelope. For stable operation and

combination of capacitors with characteristics within the

shown envelope.

FIGURE 10. PRINTED CIRCUIT BOARD ISLANDS

Q1

Q2

Q3

Q4

VIA CONNECTION TO GROUND PLANE

ISLAND ON POWER PLANE LAYER

ISLAND ON CIRCUIT/POWER PLANE LAYER

HIP6503

SS

GND

VSEN2

5VDLSB

DRV2

3V3DLSB

KEY

12V

5VSB

DLA

Q5

5VDL

3V3DL

5V

3V3

1V8SB

VCLK

1V8IN

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