840001BG

www.icst.com/products/hiperclocks.html

REV. A MAY 10, 2004

8

Integrated

Circuit

Systems, Inc.

ICS840001

Figure 3A shows a schematic example of the ICS840001. An

example of LVCMOS termination is shown in this schematic.

Additional LVCMOS termination approaches are shown in the

LVCMOS Termination Application Note. In this example, an 18

pF parallel resonant 26.5625MHz crystal is used. The C1=27pF

and C2=33pF are recommended for frequency accuracy. For

different board layout, the C1 and C2 may be slightly adjusted

for optimizing frequency accuracy. The output frequency can be

set at either 106.25MHz or 212.5MHz. Leaving the R1 un-in-

stalled (or install 1 K

Ω pull-down) will set the output frequency

at 106.25MHz. Installing the R1 pull up will set the output fre-

quency at 212.5MHz.

Figure 3B shows an example of P.C. board layout. The crystal

X1 footprint in this example allows either surface mount (HC49S)

or through hole (HC49) package. C3 is 0805. C1 and C2 are

0402. Other resistors and capacitors are 0603. This layout as-

sumes that the board has clean analog power and ground planes.

R2

10

C3

10uF

LVCMOS

C4

0.1u

VDDA

Q

R1

1K

Zo = 50 Ohm

C1

27pF

R3

43

C2

33pF

VDD

X1

OE

VDD

VDD

U1

ICS840001

1

2

3

4

8

7

6

5

VDDA

OE

XTAL_OUT

XTAL_IN

VDD

Q0

GND

FREQ_SEL

FRE_SEL

VDD=3.3V

C5

0.1u