Data Sheet

HMC902LP3E

Rev. E | Page 13 of 13

OUTLINE DIMENSIONS

3.10

3.00 SQ

2.90

0.30

0.25

0.20

1.95

1.70 SQ

1.50

1

0.50

BSC

BOTTOM VIEW

TOP VIEW

16

5

8

9

12

13

4

EXPOSED

PAD

0.45

0.40

0.35

0.05 MAX

0.02 NOM

0.20 REF

0.20 MIN

COPLANARITY

0.08

PIN 1

INDICATOR

0.90

0.85

0.80

COMPLIANT WITH JEDEC STANDARDS MO-220-VEED-4.

FOR PROPER CONNECTION OF

THE EXPOSED PAD, REFER TO

THE PIN CONFIGURATION AND

FUNCTION DESCRIPTIONS

SECTION OF THIS DATA SHEET.

SEATING

PLANE

PIN 1

INDIC ATOR AREA OPTIONS

(SEE DETAIL A)

DETAIL A

(JEDEC 95)

Figure 25. 16-Lead Lead Frame Chip Scale Package [LFCSP]

3 mm × 3 mm Body and 0.85 mm Package Height

(HCP-16-1)

Dimensions shown in millimeters

ORDERING GUIDE

Temperature Range

Lead Finish

Package Description

Package Option

HMC902LP3E

−40°C to +85°C

100% Matte Sn

16-Lead Lead Frame Chip Scale Package

HCP-16-1

HMC902LP3ETR

−40°C to +85°C

100% Matte Sn

16-Lead Lead Frame Chip Scale Package

HCP-16-1

129787-HMC902LP3E

Evaluation Board

1

The HMC902LP3E and HMC902LP3ETR are RoHS Compliant Parts.

©2018 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.

D14524-0-2/18(E)