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LT1355 датащи(PDF) 19 Page - Linear Technology |
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LT1355 датащи(HTML) 19 Page - Linear Technology |
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19 / 40 page ![]() LTC2335-16 19 233516f For more information www.linear.com/LTC2335-16 applicaTions inForMaTion OVERVIEW The LTC2335-16 is a 16-bit, low noise 8-channel multi- plexed successive approximation register (SAR) ADC with differential, wide common mode range inputs. The ADC operates from a 5V low voltage supply and flexible high voltage supplies, nominally ±15V. Using the integrated low-driftreferenceandbuffer(VREFBUF = 4.096Vnominal), this SoftSpan ADC can be configured on a conversion-by- conversionbasistoaccept±10.24V,0Vto10.24V,±5.12V, or 0V to 5.12V signals on any channel. Alternately, the ADC may be programmed to cycle through a sequence of channelsandrangeswithoutfurtheruserintervention. The input signal range may be expanded up to ±12.5V using an external 5V reference. The wide input common mode range and high CMRR (118dB typical, VIN+ = VIN– = 18VP-P 200Hz Sine) of the LTC2335-16analoginputsallowtheADCtodirectlydigitize a variety of signals, simplifying signal chain design. The absolute common mode input range is determined by the choice of high voltage supplies, which may be biased asymmetrically around ground and include the ability for either the positive or negative supply to be tied directly to ground. This input signal flexibility, combined with ±1LSB INL, no missing codes at 16-bits, and 94.4dB SNR, makes the LTC2335-16 an ideal choice for many high voltage applications requiring wide dynamic range. The LTC2335-16 supports pin-selectable SPI CMOS (1.8V to 5V) and LVDS serial interfaces, enabling it to communi- cate equally well with legacy microcontrollers and modern FPGAs.TheLTC2335-16typicallydissipates180mWwhen converting at 1Msps throughput. Optional nap and power down modes may be employed to further reduce power consumption during inactive periods. CONVERTER OPERATION The LTC2335-16 operates in two phases. During the ac- quisition phase, the sampling capacitors in each channel connect to their respective analog input pins and track the differentialanaloginputvoltage(VIN+–VIN–).Arisingedge ontheCNVpintransitionstheS/Hcircuitsfromtrackmode to hold mode, sampling the input signals and initiating a conversion. During the conversion phase, the selected channel's sampling capacitors are connected to a 16-bit chargeredistributioncapacitorD/Aconverter(CDAC).The CDAC is sequenced through a successive approximation algorithm,effectivelycomparingthesampledinputvoltage with binary-weighted fractions of the channel’s SoftSpan full-scalerange(e.g.,VFSR/2,VFSR/4…VFSR/65536)using a differential comparator. At the end of this process, the CDAC output approximates the channel’s sampled analog input.TheADCcontrollogicthenpreparesthe16-bitdigital output code for serial transfer. TRANSFER FUNCTION The LTC2335-16 digitizes the full-scale voltage range into 216 levels. In conjunction with the ADC master reference voltage, VREFBUF, the selected SoftSpan configuration determines its input voltage range, full-scale range, LSB size, and the binary format of its conversion result, as shown in Tables 1a and 1b. For example, employing the internal reference and buffer (VREFBUF = 4.096V nominal), SoftSpan 7 configures a channel to accept a ±10.24V bi- polar analog input voltage range, which corresponds to a 20.48Vfull-scalerangewitha312.5μVLSB.OtherSoftSpan configurationsandreferencevoltagesmaybeemployedto convert both larger and smaller bipolar and unipolar input ranges. Conversion results are output in two’s comple- ment binary format for all bipolar SoftSpan ranges, and in straight binary format for all unipolar SoftSpan ranges. The ideal two’s complement transfer function is shown in Figure 2, while the ideal straight binary transfer function is shown in Figure 3. Figure 2. LTC2335-16 Two’s Complement Transfer Function INPUT VOLTAGE (V) 0V –1 LSB 233516 F02 011...111 011...110 000...001 000...000 100...000 100...001 111...110 1 LSB BIPOLAR ZERO 111...111 FSR/2 – 1LSB –FSR/2 FSR = +FS – –FS 1LSB = FSR/65536 |
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